drm/rockchip: vop: skip config timing on vblank

Change-Id: I7aace5e26f6c9889c9e216f7b7233ec7e5530776
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: vop: fix display logo flash with line flag

Use standy with dsp_hold intr would effect display timing,
Some display controller can't not allow this, such as edp,
edp panel would flash with it.

Use line flag instead it seems good.

Change-Id: Iecf818c0dbd5a7833e6cec0da60fe3e693b3dc9d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

CHROMIUM: drm/rockchip: Clear interrupt status bits before enabling

The enable register only masks the raw status bits to signal CPU
interrupt only for enabled interrupts. The status bits are activated
regardless of the enable register. This means that we might have an old
interrupt event queued, which we are not interested in. To avoid getting
a spurious interrupt signalled, we have to clear the old bit before we
update the enable register.

BUG=chrome-os-partner:56378
BUG=chrome-os-partner:56580
TEST=while true; do backlight_dbus_tool --set --percent=0 && sleep 8 && backlight_dbus_tool --set --percent=100 && sleep 3 ; done

Change-Id: I1b8286097f3ba102663ee3a7566fd96492e12d26
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/382973
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

FROMLIST: drm/rockchip: vop: export line flag function

VOP have integrated a hardware counter which indicate the exact display
line that vop is scanning. And if we're interested in a specific line,
we can set the line number to vop line_flag register, and then vop would
generate a line_flag interrupt for it.

For example eDP PSR function is interested in the vertical blanking
period, then driver could set the line number to zero.

This patch have exported a symbol that allow other driver to listen the
line flag event with given timeout limit:
- rockchip_drm_wait_line_flag()

BUG=chrome-os-partner:54785
TEST=Success to call rockchip_drm_wait_line_flag()

Change-Id: Id7605bada87c8ead0e549d4ff113ee49d29ad126
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9231675/)
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-on: https://chromium-review.googlesource.com/349084
Commit-Ready: Sean Paul <seanpaul@google.com>
Tested-by: Sean Paul <seanpaul@google.com>
Reviewed-by: Sean Paul <seanpaul@google.com>

drm/rockchip: add loader protect ops to drm connector

Change-Id: Iae26ac5c994727b98db045ae00c62d641f31c4b1
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/analogix: dp: remove some function which cause loader logo flash

Change-Id: I95c75702a15cd8fb5da0939c7e40a9e08ed362ff
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: boot_logo: ignore display route when it's not available

Change-Id: I093b4edeb17c8b1159220618a43f7552070c6001
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rk3399-android-next: enable uboot charge display

Change-Id: I686a0ff43b39206e286fbd9c275c4b2d70f08b63
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

ARM64: dts: rk3399-android-next: optimize display node

Change-Id: Icbbc34bc375f6b7106966b6ea40047cc8469594d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: boot_logo: support logo fullscreen or center display

Change-Id: I2f688b84172de015eb59187d0d3de06e6764346e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: rockchip_defconfig: Use ext4 for ext2 file systems

also disable F2FS_FS_POSIX_ACL
save about 40KB size

Change-Id: I2a134966ece2a3f74014c059d2dd5bbccfe52b61
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: rockchip_defconfig: remove some ramdisks compressed mode

disable
CONFIG_RD_BZIP2
CONFIG_RD_LZMA
CONFIG_RD_XZ
CONFIG_RD_LZO
CONFIG_RD_LZ4
for save about 20KB size.

Change-Id: I15614e3a300eca6a40c62da5af2ce5cbd0b6994f
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

arm64: rockchip_defconfig: enable HZ_300

Change-Id: I19e780388de746dc8d7b6099663909fb2b20d107
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

video: rockchip: fb: update mirror for vr

Change-Id: Ibdd0e60991490115428ed04027cbaef717951d3b
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: fb: fix warning

Change-Id: Id15ac3f4f83fe788c9568f0acc78b8d4260c0579
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: vpu: change the license to GPL v2

The proprietary license would make some kernel reasouces and
function unavailable.

Change-Id: Ibaea3e3389ab05dbd60adfcc0d7e3bba787415c4
Signed-off-by: Randy Li <randy.li@rock-chips.com>

video: rockchip: vpu: fix the makefile

Keeping the build result as a single module.

Change-Id: I9f33851d9f309c344804a81375a9417daab152f9
Signed-off-by: Randy Li <randy.li@rock-chips.com>

video: rockchip: vpu: use device tree to find out target SoC

Although the SoCs before RK3288 may not support device tree,
but it could keep forward compatible.

Change-Id: Id0e4ae3ee29ce7f45c6840cf6db5eb069c9502a5
Signed-off-by: Randy Li <randy.li@rock-chips.com>

drm/rockchip: boot_logo: encoder atomic_check before enable crtc

We need update encoder output_mode and output_type before enable crtc.

Change-Id: If0c05b4d254dcac2abd6fc024fc3ffc1c5f02323
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

camera: rockchip: camsys_drv v0.0x21.7

Change-Id: Id8d254f74b3eeb251d7369dc866f32f026d606df
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

arm64: dts: rockchip: rk3399-android-next: add isp

Change-Id: I8db91aae4dfd9c1b1ad39adb1e8377aba0c34fca
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

ARM64: dts: rockchip: rk3399: add iommu for isp

Change-Id: Ic405ab5877355ed4128e3f473c21acdf5d026d1d
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

ARM: dts: rockchip: enable the vpu service for rk3288 evb

Both VPU and HEVC service are enabled.

Change-Id: Id6dc1f0139636e8b2016b9194adddc3f87ec4e19
Signed-off-by: Randy Li <randy.li@rock-chips.com>

ARM: dts: rockchip: add hevc vpu service for rk3288

Change-Id: I87a8c9df636e04b92948c87c27e82b43a67de184
Signed-off-by: Randy Li <randy.li@rock-chips.com>

camera: camsys_drv: v0.0x21.6 support drm

Change-Id: If0305388c5b445adbcf693504849a6be000e64a9
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

ARM64: dts: rk3399-evb-rev1-android: enable isp0&isp1

Change-Id: I88dda6f8e90f549ff1bbe791acec94eae30fdd45
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

UPSTREAM: iommu/rockchip: Don't feed NULL res pointers to devres

If we do, devres prints a "invalid resource" string in the error
loglevel.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit 8d7f2d84ed2d44b05e1ce88fa4b74886af46a139)

Change-Id: I3849bcaa4ceaea3247a8169b2a123a834011fbc5
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

Revert "iommu/rockchip: fix bool operation error and probe warning"

This reverts commit e0492807e6b91becccbcab6eca1df27da55d726b.

Same issue fixed by upstream(e04928 "iommu/rockchip: fix bool operation
error and probe warning) which picked as (2e7026 "UPSTREAM: iommu/rockchip:
Fix "is stall active" check).

Conflicts:
drivers/iommu/rockchip-iommu.c

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Change-Id: I56e61894b1da14bce78ae1b3d08158dfb5b027bb

CHROMIUM: iommu/rockchip: Fix TLB flush of secondary IOMMUs

Due to the bug in current code, only first IOMMU has the TLB lines
flushed in rk_iommu_zap_lines. This patch fixes the inner loop to
execute for all IOMMUs and properly flush the TLB.

BUG=chrome-os-partner:55135
TEST=compile

Change-Id: Ica2d4b0cc3d3cbc88c70ad541dc00883f1b4e90c
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/371098
Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Randy Li <randy.li@rock-chips.com>

drm/rockchip: vop: fix scale abnormal after window power on/off

Change-Id: Ifcaddf2f2b1c9c031bdf28ceb80468cfb79ce52b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

camera: rockchip: porting ov8858&ov4689&ov2710 driver

Change-Id: Ia9a0a39d347a9fd506f493c6639785267233e0ac
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

ARM64: dts: rk3399: move opp tables to rk3399-opp.dtsi

Add a new dtsi file - rk3399-opp.dtsi, to configure opp-tables
for cpu, gpu and dmc.

Add rk3399-early-opp.dtsi for board with ES1, which need limit
frequency for cpu, gpu and dmc.

Change-Id: Ib57761fd5f405b0e79039d7a01e6e023d6f5dc2c
Reviewed-by: Finley Xiao <finley.xiao@rock-chips.com>
Reviewed-by: Huang, Tao <huangtao@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

ARM: dts: rockchip: add vpu service for RK3288

It is not harm to keep both vpu service and vpu v4l2 at the same time,
that the board file choose a driver implementation and interace to
be used.

Change-Id: If79deac5bf19395cfdca821f20486985e3034389
Signed-off-by: Randy Li <randy.li@rock-chips.com>

ARM: dts: enable SD and GMAC at rk3288-evb

There is a bug in GMAC IP, it supports RGMII clock but not a speed
mode for it.

Change-Id: I8e5cca355c30920db37400901d3411eebca711ae
Signed-off-by: Randy Li <randy.li@rock-chips.com>

isp10: rockchip: v0.1.6

Change-Id: I1b702fb51d1baabd47f190fdafd79ecd22e18be0
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

ARM64: dts: rk3399-evb-rev3-android: enable isp0&isp1

Change-Id: Ib2d4f304e2fc4589d55e60d452571ed46e5dae4d
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

ARM64: dts: rk3399-evb-rev2-android: enable isp0&isp1

Change-Id: Ibd5244985eb707ca9119191cf019b56ae9055eb4
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

ARM64: dts: rk3399-android: add isp0 node for isp10

Change-Id: I1324bd021ec87f10ad4b5fd200bdf83efd1dab66
Signed-off-by: dalong.zhang <dalon.zhang@rock-chips.com>

devfreq: rockchip: dmc: support sharing regulator with other devices

If the regulator is shared between several devices then the lowest
request voltage that meets the system constraints will be used.

Change-Id: I9645f3f81004c7203769a92367513d9d177504b2
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

MALI: midgard: support sharing regulator with other devices

If the regulator is shared between several devices then the lowest
request voltage that meets the system constraints will be used.

Change-Id: I7dda43b24c7e19098db65b51ae0c4386b46ee0b7
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

devfreq: rockchip: avoid DDR voltage domain keeping the initial voltage

If there is only one opp whose frequency is equal to the initial value
in opp table list, the DDR voltage domain will keep the initial voltage,
it may be too large.

Change-Id: I9e75d54bdc7d909baa72667821ff30beb4d62e27
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

MALI: midgard: avoid GPU voltage domain keeping the initial voltage

If there is only one opp whose frequency is equal to the initial value
in opp table list, the GPU voltage domain will keep the initial voltage,
it may be too large.

Change-Id: I87a5fb82eaac8466123b61e39a5d7587da3066da
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

PM / AVS: rockchip-cpu-avs: support adjusting initial frequency and voltage

Change-Id: I377b7fccb90ecf350a37e4609bdc8f51c4e15e7a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

cpufreq: dt: delete flag CPUFREQ_NEED_INITIAL_FREQ_CHECK

As there are still some limitations, we prefer to implement it ourselves.

Change-Id: Ic801ed0a137b025296144cb3d8e47bcb0f8c0567
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

PM / OPP: Add dev_pm_opp_check_initial_rate()

Bootloader or kernel sets CPU frequency to an initial value before cpufreq
starts on rockchip platform, if cpu's opp table is modified to a specified
value, it will cause an issue.

For example, the initial frequency is 816MHz and voltage set by hardware
is 900mV:
1. there is only one opp whose frequency is 816MHz and voltage is 850mV
in opp table list, as they frequency is equal, the voltage will not be
changed, it is still 900mV and a little too large relative to 850mV.
2. there is only one opp whose frequency is 1200MHz and voltage is 1100mV
in opp table list, as it doesn't set voltage to 1100mV before set frequency
to 1200MHz in the dev_pm_opp_set_rate function, the initial voltage 900mV
cann't supply for 1200MHz, the system crash.

Change-Id: Id8c5efc34d9c94ff37921b33f5a76e059240d368
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

UPSTREAM: iommu/rockchip: Prepare to support generic DMA mapping

Set geometry for allocated domains and fix .domain_alloc() callback to
work with IOMMU_DOMAIN_DMA domain type, which is used for implicit
domains on ARM64.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit a93db2f22b6b48369acb72f66a0ae47ec17a0b05)

Change-Id: Ib04827afadbfb32ca52c6842cd056952269cbe93
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

UPSTREAM: iommu/rockchip: Use DMA API to manage coherency

Use DMA API instead of architecture internal functions like
__cpuc_flush_dcache_area() etc.

The biggest difficulty here is that dma_map and _sync calls require some
struct device, while there is no real 1:1 relation between an IOMMU
domain and some device. To overcome this, a simple platform device is
registered for each allocated IOMMU domain.

With this patch, this driver can be used on both ARM and ARM64
platforms, such as RK3288 and RK3399 respectively.

Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit 4f0aba676735c653b4e739b760c1e66cd520d3e3)

Conflicts:
drivers/iommu/rockchip-iommu.c

Change-Id: I0424318ed0cea947e7c8f8d3b52f716f6cc98ce0
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

UPSTREAM: iommu/rockchip: Fix allocation of bases array in driver probe

In .probe(), devm_kzalloc() is called with size == 0 and works only
by luck, due to internal behavior of the allocator and the fact
that the proper allocation size is small. Let's use proper value for
calculating the size.

Fixes: cd6438c5f844 ("iommu/rockchip: Reconstruct to support multi slaves")
Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit 3d08f434bd58656ae630376d0b5afd6ca1ffb013)

Change-Id: I78db8fbf3cb781745a05f8bee492dd7e8ac784c5
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

UPSTREAM: iommu/rockchip: Fix zap cache during device attach

rk_iommu_command() takes a struct rk_iommu and iterates over the slave
MMUs, so this is doubly wrong in that we're passing in the wrong pointer
and talking to MMUs that we shouldn't be.

Fixes: cd6438c5f844 ("iommu/rockchip: Reconstruct to support multi slaves")
Cc: stable@vger.kernel.org
Signed-off-by: John Keeping <john@metanate.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit ae8a7910fb0568531033bd6ebe65590f7a4fa6e2)

Change-Id: I5d6f5dd49ad0f79facee8d345c5058af80226f83
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

UPSTREAM: iommu/rockchip: Fix "is stall active" check

Since commit cd6438c5f844 ("iommu/rockchip: Reconstruct to support multi
slaves") rk_iommu_is_stall_active() always returns false because the
bitwise AND operates on the boolean flag promoted to an integer and a
value that is either zero or BIT(2).

Explicitly convert the right-hand value to a boolean so that both sides
are guaranteed to be either zero or one.

rk_iommu_is_paging_enabled() does not suffer from the same problem since
RK_MMU_STATUS_PAGING_ENABLED is BIT(0), but let's apply the same change
for consistency and to make it clear that it's correct without needing
to lookup the value.

Fixes: cd6438c5f844 ("iommu/rockchip: Reconstruct to support multi slaves")
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
(cherry picked from commit fbedd9b9905c1643b9f7244d88999e39632bbd87)

Conflicts:
drivers/iommu/rockchip-iommu.c

Change-Id: I5a43eb19d515eba7daf1dc4b1592ac692c115df0
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>

UPSTREAM: arm64: dts: rockchip: add gmac needed pclk for rk3399 pd

This patch fixes that sometimes hang at start-up time of the system.
As the below log:
...
[   11.136543] calling  pm_genpd_debug_init+0x0/0x60 @ 1
[   11.141602] initcall pm_genpd_debug_init+0x0/0x60 returned 0 after 11 usecs
[   11.148558] calling  genpd_poweroff_unused+0x0/0x84 @ 1
<hang>

In some cases, the rk3399 should turn off the gmac power domain to save
power if some boards didn't register the gmac device node for rk3399.
Then, rk3399 need to make sure the gmac's pclk enabled if we need
operate the gmac power domain. (Due to the NOC had enabled always)

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(am from git/mmind/linux-rockchip.git branch for-next
 commit 2afc1db0c5bad5da75556889ebc3e75661be9028)

Change-Id: I8425b83e617de9eafaa093c3342b8e6082eb4112
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

drm/rockchip: vop: fix display flash when switch to iommu mapping

Do iommu mapping with looping vop vblank register have a problem, when
iommu attach take too long time or vblank time is too short, the display
would flash.

This patch use another method to fix this problem:
  Use standby and dsp_hold interrupt to enter vblank time, when iommu
  mapping is finish, exit vop standby, then vop would start scanout
  immediately,
      vop enter standby    -> |
      dsp_hold irq         -> |--------- vblank start
      do iommu mapping     -> | vblank time
      exit standby         -> |--------- vblank end

We try add 20ms delay to iommu attach, display also looks good, that
means this method have higher compatibility.

Change-Id: I59d57c9085631d0c42174ea18890c80e26b42d22
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm: rockchip: sync rga driver from 3.14

Change-Id: I503006eea09a9352186eeac645f03f513213c148
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

ARM64: dts: rk3399: add clock-latency-ns for each opp

We may miss clock-latency-ns when disable some opps, then cpufreq
will fallback to performance governor, so add clock-latency-ns for
each opp to make disable opp easy.

code as below:
drivers/cpufreq/cpufreq.c:2010
if (policy->governor->max_transition_latency &&
    policy->cpuinfo.transition_latency >
    policy->governor->max_transition_latency) {
if (!gov)
         return -EINVAL;
else {
       pr_warn("%s governor failed, too long transition latency of HW,
fallback to %s governor\n",
                 policy->governor->name, gov->name);
         policy->governor = gov;
}
}

Change-Id: I93cff667deb487baa0115b7af0206f0803010d37
Signed-off-by: Chen Liang <cl@rock-chips.com>

cpufreq: cpufreq_interactive: avoid NULL point access

Change-Id: Id21a45eff24575ade7786a88d076ddd50cba6520
Signed-off-by: Chen Liang <cl@rock-chips.com>

drm/rockchip: add rk3399 vop big csc support

Change-Id: I61df68291467edfd030166b3074b44c6fdca5ffb
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm/rockchip: support 10bit yuv format

Change-Id: I7c1f9c3b0a4b8e711d8ce198af9b94bd7639bf17
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

drm: add 10bit support for yuv format

drm_format_plane_cpp use byte size, not works for 10bit
format, use drm_format_plane_bpp instead.

Change-Id: If1a6ca1c286747fdc868184cebe75eb0af0a746d
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

MALI: utgard: .gitignore: ignore the build generation config

Change-Id: I02a938a390f5f29afa11042b49125031ba303074
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

arm64: dts: rk3399-android-next: Enable rga device

Change-Id: Ib07fcaa199ba0742973ae874edcc5f1b835e99c9
Signed-off-by: Zikim,Wei <wzq@rock-chips.com>

arm64: dts: rockchip: rk3399: config vop0 as main screen for box disvr

Change-Id: I0a25424265273a6a8d010da7205f74dcab7c1e8d
Signed-off-by: Luo wei <lw@rock-chips.com>

arm64: rockchip_defconfig: enable PCIE

Change-Id: I29413cfa07ff1ec378bf3b3e892b0019cfd90bcb
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

UPSTREAM: PCI: rockchip: correct the use of FTS mask

We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but
we're doing the inverse. That doesn't have too much effect, since we're
setting all the [23:8] bits to 1, and the other bits are only relevant
for modes we're currently not using. But we should get this right.

Change-Id: I98ec66f1fdc5f99cc2432d7a1cddb63f4b9f3c30
Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit fd7c054e782d57509b2355ab71b786d83ab44194)

UPSTREAM: PCI: rockchip: Add quirk to disable RC's ASPM L0s

Rockchip's RC outputs 100MHz reference clock but there are
two methods for PHY to generate it.

(1)One of them is to use system PLL to generate 100MHz clock and
the PHY will relock it and filter signal noise then outputs the
reference clock.

(2)Another way is to share Soc's 24MHZ crystal oscillator with
PHY and force PHY's DLL to generate 100MHz internally.

When using case(2), the exit from L0s doesn't work fine occasionally
due to the broken design of RC receiver's logical circuit. So even if
we use extended-synch, it still fails for PHY to relock the bits from
FTS sometimes. This will hang the system.

Maybe we could argue that why not use case(1) to avoid it? The reason
is that as we could see the reference clock is derived from system PLL
and the path from it to PHY isn't so clean which means there are some
noise introduced by power-domain and other buses can't be filterd out
by PHY and we could see noise from the frequency spectrum by oscilloscope.
This makes the TX compatibility test a little difficult to pass the spec.
So case(1) and case(2) are both used indeed now. If using case(2), we
should disable RC's L0s support, and that is why we need this property to
indicate this quirk.

Also after checking quirk.c, I noticed there is already a quirk for
disabling L0s unconditionally, quirk_disable_aspm_l0s. But obviously we
shouldn't do that as mentioned above that case(1) could still works fine
with L0s.

Change-Id: Ia9506d55f34a24001c19d398a8ecb088558c0f7e
Reported-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Cc: Brian Norris <briannorris@chromium.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit c2af19ee1b5e0f0ef942d27b18f7e22e2ab43cba)

UPSTREAM: PCI: rockchip: cleanup bit definition for PCIE_RC_CONFIG_LCS

PCIE_RC_CONFIG_LCS contains control and status bits specific
to the PCIe link. The layout for this register looks the same
as the existed PCI_EXP_LNKCTL and PCI_EXP_LNKSTA. So let's
reuse them.

Change-Id: I3e2b88d9c12f2bf924a3d6b8f2254904f9b594b2
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 144ded1828f015f1a53d50bce730ed15f17ff38f)

UPSTREAM: arm64: dts: rockchip: add three new resets for rk3399 PCIe

pm_rst, aclk_rst and pclk_rst should be controlled by driver, so we
need to add these three resets for PCIe controller.

Change-Id: I364d8d0cb57d9d349153d76189f1e20e40e32704
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 4d3222f7071c01104b43300f1c10b55723df8f68)

UPSTREAM: PCI: rockchip: Add three new resets as required properties

pm_rst, aclk_rst, pclk_rst was controlled by rom code so the
software wasn't needed to control it again in theory. But it
didn't work properly, so we do need to do it again and add a
enough delay between the assert of pm_rst and the deassert of
pm_rst. The Soc intergrated with this controller, rk3399 is still
under MP test internally, so the backward compatibility won't be
a big deal.

Change-Id: I07e02c5dcd6985ce7d16dde18bf0390674a0adbf
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 31a3a7b5b26f75fbe82de10ca99f2b673f6c26b4)

UPSTREAM: PCI: rockchip: remove the pointer to L1 substate cap

Per the errata of TRM, the RC can't support L1 substate, so we
need to remove the L1 substate cap as well as operation for
PCIE_RC_CONFIG_L1_SUBSTATE_CTRL2.

Change-Id: If3e1e7ac46720c9487724f15b22905a02bebb7ca
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 9d7598543b5fa2dacd7ccdffe9e03b578a9a03d1)

UPSTREAM: PCI: rockchip: Specify the link capability

rk3399 supports PCIe 2.x link speeds marginally at best, and on some
boards, the link won't train at 5 GT/s at all. Rather than sacrifice
500ms waiting for training that will never happen, let's use the helper
function, of_pci_get_max_link_speed, to get the max link speed from DT
and specify link capability.

Change-Id: I899df707f0555eea8ae4a370b171a4786162bb90
Signed-off-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 9d4052126b0deeb67552580ffe7f6383e0123c62)

UPSTREAM: of/pci: Add helper function to parse max-link-speed from dt

This new helper function could be used by host drivers to
get the limitaion of max link speed provided by dt. If the
property isn't assigned or is invalid, it will return -EINVAL
to the caller.

Change-Id: I430b05fa5fd25fe17cf1bd8b1226e460eb7dd14b
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 9a1dc3891255afd836f355b117fd6b975d0b1eb2)

UPSTREAM: Documentation/devicetree: Add new property to specify the max link speed

Some of the host drivers have the requirement of knowing whether the
EP would never train at some link speed at all. For instance, on some
boards, the link won't train at 5 GT/s but the host driver still sacrifice
some cycle to wait for the resule of training at 5 GT/s as the host could
actually support 5 GT/s. So we could parse this new property and make the
host drivers be aware of these cases.

Change-Id: I7f557282462a7146d8d15af560001c81ccc7e1a7
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 2fa39159b6a9931d6fd82ecbe65357e0ad77e1a4)

UPSTREAM: PCI: rockchip: fix wrong negotiated lanes calculation

The calculation of negotiated lanes is wrong since it should
be shifted by PCIE_CORE_PL_CONF_LANE_SHIFT, but it is shifted
by PCIE_CORE_PL_CONF_LANE_MASK. Let's fix it.

Change-Id: I164d07c86e944fdab7c1a3100c87fdd24ec0ee82
Fixes: commit e77f847df54c ("PCI: rockchip: Add Rockchip PCIe controller support")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 898a2301cf002e1d96c0d56e41131a0d57cacb65)

UPSTREAM: PCI: rockchip: Add Kconfig COMPILE_TEST

Allow selection of the Rockchip driver for compile testing, even if we
aren't building for ARCH_ROCKCHIP.

Change-Id: Ibc554863e067aaa1f785d5f26423a10d0962f68b
[bhelgaas: changelog]
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit cd075fd9742b1c4bc6e11121f688ef2ff74deb84)

UPSTREAM: PCI: rockchip: Mark RC as common clock architecture

The default value of common clock configuration is
zero indicating Rockchip's RC is using asynchronous
clock architecture but actually we are using common
clock. This will confuses some EP drivers if they
need some different settings referring to this value.
So let's fix it.

Change-Id: Idc3bf918db1a0b2366010819972d231cdbceca2d
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit f4acd83a6c303ef72a42e9ea2c8c12298d333a66)

UPSTREAM: PCI: rockchip: Provide captured slot power limit and scale

If vpcie3v3 is available, we could provide these information
via RC's configure register to make EP able to know the power
limit.

Change-Id: I73f3ea163a24a9a03078436e0a4b6303482c123c
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit 7cfdc39fadfdf5728e79a43242ff6b13e298c086)

arm64: rockchip_defconfig: disable unused ethernet driver

Change-Id: I61a9e326368378674527ed2ee59ed4da8cdc680a
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

UPSTREAM: power_supply: fix return value of get_property

power_supply_get_property() should ideally return -EAGAIN if it is
called while the power_supply is being registered. There was no way
previously to determine if use_cnt == 0 meant that the power_supply
wasn't fully registered yet, or if it had already been unregistered.

Add a new boolean to the power_supply struct to simply show if
registration is completed. Lastly, modify the check in
power_supply_show_property() to also ignore -EAGAIN when so it
doesn't complain about not returning the property.

Change-Id: I8a710802534c033d64589d8d213eeaa36d9cc7d7
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit e380538529e83c5d3fd27e8cbfcc1f9799cb6bbb)

UPSTREAM: thermal: rockchip: improve the warning log

It is no necessary to print warning agian and again if we don't
add rockchip,grf for dt, otherwise I saw the following log when
doing suspend-2-resume. We only need to print it once when parsing
dt. It looks quite trivial but the log is apparently verbose.

[   26.615415] PM: early resume of devices complete after 1.539 msecs
[   26.622002] rk_tsadcv2_initialize: Missing rockchip,grf property
[   26.629359] rk_gmac-dwmac ff290000.ethernet: init for RGMII
[   26.639794] PM: resume of devices complete after 18.109 msecs
[   26.646925] Restarting tasks ... done.

Change-Id: Ia3124f557e2b4f47c691671d27ea6a0f136f3f6f
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org evalenti/linux-soc-thermal.git next
 commit 947d62b53ff381d1ca4b3288b53a26c6d38957aa)

UPSTREAM: dt-bindings: rockchip-thermal: fix the misleading description

"rockchip,hw-tshut-temp", "rockchip,hw-tshut-mode" and
"rockchip,hw-tshut-polarity" are not a required properties
actually as the code could also work by loading the default
settings there. So it is apprently misleading, although we
prefer to get these from DT. And it seems we miss the 'rockchip,grf'
here which should also be an optional property.

Change-Id: I5ae62b7137f88da40475caec3b6d43a00219d85d
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org evalenti/linux-soc-thermal.git next
 commit 38e133ee6ea54bdfbe64c0e57bea4bc1e616c19a)

arm64: dts: rk3399-vr: set headset_gpio GPIO_ACTIVE_LOW

Change-Id: I37f7eddd4aff08ba7fb4d2e3299485f58c8ac826
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>

ARM: rockchip: clean mach-rockchip folder

 We don't need those files from 3.10, so remove it to make it tidy

Change-Id: Iba08ac60d94e5dd014674a4b2c017020993abe60
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

arm64: configs: synchronize with other 3399 config for 3399 linux

add more driver config and architecture config

Change-Id: I55900807579a2fdaa8a31baaa3ed087c115f88c3
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

arm64: dts: rockchip: Add rk3399 mid dts for drm

Change-Id: I7aa309ef7c4cd0ec34ab030f7798d7b778e897c6
Signed-off-by: Bin Yang <yangbin@rock-chips.com>

phy: phy-rockchip-typec: select phy select bit before TCPHY enter A2.

Set phy select bit in typec driver instead of setting it in dp driver,
which is used to fix dp phy power on failed error if only use typec1
as dp output.

Change-Id: I3949305724f5b3c12dc2f0ffefcbe4abf26d43dd
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>

video: rockchip: dp: remove dp phy select operation in dp driver.

Previous code select dp phy by dp->port->id, but this id can't
indicate the phy id, and it will introduce a phy power on bug if
we only use typec1 as dp output, so we move these code to typec
phy driver.

Change-Id: If809efe9138b186b060e6c7467473f2d3192bc7e
Signed-off-by: wenping.zhang <wenping.zhang@rock-chips.com>

arm64: dts: rockchip: add touscreen for excavator linux

Change-Id: I8fb62eea9667c6c1c646b70fd9d10671b07957a2
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

fbdev/fb_notify: fix blank_mode pointer crash

When fb event is not blank event, use *((int *)event->data) for
blank_mode is very dangerous, see follow code on
drivers/video/fbdev/core/fbmem.c:
struct fb_event event;
event.info = fb_info;
fb_notifier_call_chain(FB_EVENT_FB_REGISTERED, &event);

On FB_EVENT_FB_REGISTERED event, event->data is not initial,
so get value from *(int*)event->data would crash.

crash:
[    0.909647] Unable to handle kernel paging request at virtual address
12c000000000
[    0.915506] pgd = ffffff8009147000
[    0.915808] [12c000000000] *pgd=00000000f6ff9003, *pud=00000000f6ff9003, *pmd=0000000000000000
[    0.916577] Internal error: Oops: 96000004 [#1] PREEMPT SMP
[    0.917067] Modules linked in:
[    0.917347] CPU: 4 PID: 51 Comm: kworker/u12:1 Not tainted 4.4.30
[    0.917919] Hardware name: Rockchip RK3399 Evaluation Board v1 (Android) (DT)
[    1.098438] [<ffffff8008729fb0>] rkvr_fb_event_notify+0x38/0x18c
[    1.098976] [<ffffff80080b8c7c>] notifier_call_chain+0x48/0x80
[    1.099499] [<ffffff80080b8fb8>] __blocking_notifier_call_chain+0x48/0x64
[    1.100104] [<ffffff80080b8fe8>] blocking_notifier_call_chain+0x14/0x1c
[    1.100699] [<ffffff80083e4abc>] fb_notifier_call_chain+0x44/0x50
[    1.101242] [<ffffff80083e6da8>] register_framebuffer+0x1bc/0x288
[    1.101790] [<ffffff8008431e00>] drm_fb_helper_initial_config+0x2c0/0x354
[    1.102395] [<ffffff80084630e4>] rockchip_drm_fbdev_init+0xc8/0x104
[    1.102957] [<ffffff8008459fec>] rockchip_drm_load+0x91c/0x9c4
[    1.103478] [<ffffff800843a4c0>] drm_dev_register+0x78/0xc0
[    1.103978] [<ffffff8008458c0c>] rockchip_drm_bind+0x64/0x90
[    1.104488] [<ffffff800849e93c>] try_to_bring_up_master.part.3+0xb0/0x118
[    1.105093] [<ffffff800849eb68>] component_master_add_with_match+0xcc/0x12c
[    1.105714] [<ffffff80084591e0>] rockchip_drm_platform_probe+0x198/0x1c8
[    1.106313] [<ffffff80084a55b0>] platform_drv_probe+0x58/0xa4
[    1.106827] [<ffffff80084a38a0>] driver_probe_device+0x114/0x280
[    1.107362] [<ffffff80084a3b5c>] __device_attach_driver+0x88/0x98
[    1.107905] [<ffffff80084a1d7c>] bus_for_each_drv+0x7c/0xac
[    1.108402] [<ffffff80084a36d8>] __device_attach+0xa8/0x128
[    1.108900] [<ffffff80084a3ca0>] device_initial_probe+0x10/0x18
[    1.109427] [<ffffff80084a2d1c>] bus_probe_device+0x2c/0x8c
[    1.109924] [<ffffff80084a3170>] deferred_probe_work_func+0x74/0xa0
[    1.110486] [<ffffff80080b2e34>] process_one_work+0x218/0x3e0
[    1.111001] [<ffffff80080b3530>] worker_thread+0x24c/0x374
[    1.111490] [<ffffff80080b7dbc>] kthread+0xe8/0xf0
[    1.111922] [<ffffff8008082690>] ret_from_fork+0x10/0x40

Change-Id: I11f667830d913430d9e0b4da2b391815d335ecb8
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

arm64: dts: rockchip: add efuse device node for rk3366

Add a efuse node in the device tree for the ARM64 rk3366 SoC.

Change-Id: I163003e7e181645579a2af53003892ba46646706
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

nvmem: rockchip-efuse: add rk3366-efuse support

This adds the necessary data for handling efuse on the rk3366.

Change-Id: Ia9b03776172c9a66faa7320f7e1890549538a32a
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

clk: rockchip: add clock ids for efuse on RK3366

Set the newly added id for efuse, so that they can be called
in other parts.

Change-Id: Id372ca207901aed689304f862412b2cf1e08fa80
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

input: sensors: fromdos and remove trailing whitespace

Change-Id: I6799f2538f95953d1565ac805497161ce6043855
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>

UPSTREAM: clk: rockchip: rk3399: fix copy-paste error

Fix RK3368_* to RK3399_* for rk3399 clk_test clock.

Change-Id: I3be8f582ab9a0ee484bf47e2090f020bbd4a7c72
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9430735/)

clk: rockchip: remove more CLK_IGNORE_UNUSED for rk3399 clocktree

Optimize rk3399 clocktree by removing CLK_IGNORE_UNUSED of some clocks.

clocks will managered by usb:
- clk_usbphy0_480m_src
- clk_usbphy1_480m_src
- clk_usbphy_480m

clocks will be managered by pvtm:
- clk_pvtm_core_l
- clk_pvtm_core_b
- clk_pvtm_ddr

clocks will be managered by dfi:
- pclk_ddr_mon
- clk_dfimon0_timer
- clk_dfimon1_timer
- aclk_dcf
- pclk_dcf

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
(am from https://patchwork.kernel.org/patch/9410123/)

Change-Id: I9c32423cafde00fc47673638633ca0c884253f36
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

CHROMIUM: devfreq: rockchip: remove wait dcf irq evnet

We have already wait dcf done in ATF, so don't need wait dcf irq
in kernel, besides, clear dcf irq in kernel will import competiton
between kernel and ATF, only handle dcf irq in ATF is a better way.

BUG=chrome-os-partner:54651
TEST=Boot from kevin

Change-Id: Ibfc460bebb86eb72a218fbf39176d30320da2c57
Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

arm64: configs: add some devfreq gov for rk3399 linux

gpu dvfs need SIMPLE_ONDEMAND

Change-Id: I7f3247a7571e40cbfe929996d1c4db4b11ea63a5
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

arm: configs: add some devfreq gov for rk3288 linux

add more devfreq gov to let driver choose it.

Change-Id: Id47b519e1f41311283bf3f38b94cae3b8480aff4
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>

video: rockchip: fb: fix inconsistent returns 'mutex:&dev_drv->front_lock'

Change-Id: If937a6cbc6d89ff0b4dbd2f540a87da1af3c4123
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: fb: add api to enable mirror for VR

Change-Id: Ic9a6409f0243896021eb94df3600cdc2fc3db637
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

video: rockchip: fb: update for x and y mirror

Change-Id: Ieca4a74af4b4ca2f5d90e7387601e2f87b0ac883
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

arm: configs: enable devfreq thermal for rk3288 linux

to enable gpu

Change-Id: I818b27927847bb1c62f60eb4b0335d1818f30dff
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>