drm/rockchip: vop: skip config timing on vblank
authorMark Yao <mark.yao@rock-chips.com>
Fri, 2 Dec 2016 09:34:53 +0000 (17:34 +0800)
committerMark Yao <mark.yao@rock-chips.com>
Fri, 2 Dec 2016 11:10:40 +0000 (19:10 +0800)
Change-Id: I7aace5e26f6c9889c9e216f7b7233ec7e5530776
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
drivers/gpu/drm/rockchip/rockchip_drm_vop.c

index 4a16d310aac17db7cbf0c2605ffa262445dc9230..d4bf02066b11cb61bc1df2153146319bd292e476 100644 (file)
@@ -1338,14 +1338,19 @@ static void vop_crtc_enable(struct drm_crtc *crtc)
        u16 vsync_len = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
        u16 vact_st = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_start;
        u16 vact_end = vact_st + vdisplay;
+       uint32_t version = vop->data->version;
        uint32_t val;
 
        vop_enable(crtc);
        /*
         * If dclk rate is zero, mean that scanout is stop,
         * we don't need wait any more.
+        *
+        * Since vop version(3,4), vop timing is frame effect, not need config
+        * timing register on vblank.
         */
-       if (clk_get_rate(vop->dclk)) {
+       if (clk_get_rate(vop->dclk) &&
+           !(VOP_MAJOR(version) == 3 && VOP_MINOR(version) >= 4)) {
                /*
                 * Rk3288 vop timing register is immediately, when configure
                 * display timing on display time, may cause tearing.