UPSTREAM: PCI: rockchip: correct the use of FTS mask

We're trying to mask out bits[23:8] while retaining [32:24, 7:0], but
we're doing the inverse. That doesn't have too much effect, since we're
setting all the [23:8] bits to 1, and the other bits are only relevant
for modes we're currently not using. But we should get this right.

Change-Id: I98ec66f1fdc5f99cc2432d7a1cddb63f4b9f3c30
Fixes: ca1989084054 ("PCI: rockchip: Fix wrong transmitted FTS count")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(am from git.kernel.org/cgit/linux/kernel/git/next/linux-next.git
commit fd7c054e782d57509b2355ab71b786d83ab44194)

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 86f08f3..57ac7b2 100644 (file)
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -569,7 +569,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
 
        /* Fix the transmitted FTS count desired to exit from L0s. */
        status = rockchip_pcie_read(rockchip, PCIE_CORE_CTRL_PLC1);
-       status = (status & PCIE_CORE_CTRL_PLC1_FTS_MASK) |
+       status = (status & ~PCIE_CORE_CTRL_PLC1_FTS_MASK) |
                 (PCIE_CORE_CTRL_PLC1_FTS_CNT << PCIE_CORE_CTRL_PLC1_FTS_SHIFT);
        rockchip_pcie_write(rockchip, status, PCIE_CORE_CTRL_PLC1);