firefly-linux-kernel-4.4.55.git
8 years agorockchip/rga: Enable runtime PM of RGA
Zhiqin Wei [Wed, 1 Jun 2016 09:22:11 +0000 (17:22 +0800)]
rockchip/rga: Enable runtime PM of RGA

Change-Id: I9452da520b675cb5d3a5ac8795571ade53e65297
Signed-off-by: Zhiqin Wei <wzq@rock-chips.com>
8 years agoARM64: dts: rk3399: android: Enable rga power domain
Zhiqin Wei [Wed, 1 Jun 2016 13:31:17 +0000 (21:31 +0800)]
ARM64: dts: rk3399: android: Enable rga power domain

Change-Id: Ia50326d382dd8c45a53dc388c029eb96bb6b7b00
Signed-off-by: Zhiqin Wei <wzq@rock-chips.com>
8 years agoiommu: dma-iommu: export common_iommu_{setup|teardown}_dma_ops
Huang, Tao [Wed, 1 Jun 2016 11:19:15 +0000 (19:19 +0800)]
iommu: dma-iommu: export common_iommu_{setup|teardown}_dma_ops

This patch adds EXPORT_SYMBOL_GPL calls to common_iommu_setup_dma_ops
and common_iommu_teardown_dma_ops.

Change-Id: I379d487967587cdb9caffa006a7f3763e6cbfb13
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
8 years agoUPSTREAM: drm/rockchip: inno_hdmi: get rid of rockchip_drm_crtc_mode_config
Mark Yao [Wed, 20 Apr 2016 02:41:42 +0000 (10:41 +0800)]
UPSTREAM: drm/rockchip: inno_hdmi: get rid of rockchip_drm_crtc_mode_config

Save output_type and output_mode into rockchip_crtc_state,
it's nice to make them into atomic.

Change-Id: I35b000a5dc599449dccf98c1fe58de24073b5246
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Tested-by: John Keeping <john@metanate.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 4e257d9eee23582e36637ce7ea6b14f6f56b1839)

8 years agoUPSTREAM: drm/rockchip: inno_hdmi: fix an error code
Dan Carpenter [Thu, 25 Feb 2016 21:30:29 +0000 (00:30 +0300)]
UPSTREAM: drm/rockchip: inno_hdmi: fix an error code

We were accidentally returning PTR_ERR(NULL) which means success when we
wanted to return a negative error code.

Change-Id: Ia56827712eeaafef93ce433c0e05b95534784e30
Fixes: 412d4ae6b7a5 ('drm/rockchip: hdmi: add Innosilicon HDMI support')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Yakir Yang <ykk@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 2743becb3338cf012dbe7b70c6c39bbac81cc101)

8 years agoUPSTREAM: dt-bindings: add document for Innosilicon HDMI on Rockchip platform
Yakir Yang [Fri, 29 Jan 2016 07:10:33 +0000 (15:10 +0800)]
UPSTREAM: dt-bindings: add document for Innosilicon HDMI on Rockchip platform

Change-Id: If720c53580e7afde6aa8e2924dff643a552ad3b2
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
(cherry picked from git.kernel.org next/linux-next.git master
 commit a2b5f9b9f308f66140a14150b8b9162ce9ca043b)

8 years agoUPSTREAM: drm/rockchip: hdmi: add Innosilicon HDMI support
Yakir Yang [Wed, 3 Feb 2016 09:44:57 +0000 (17:44 +0800)]
UPSTREAM: drm/rockchip: hdmi: add Innosilicon HDMI support

The Innosilicon HDMI is a low power HDMI 1.4 transmitter
IP, and it have been integrated on some rockchip CPUs
(like RK3036, RK312x).

Change-Id: If2c52391f3dc6ca6de4411496c137b5b2fd5cb92
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 412d4ae6b7a508136822cd500c6a7e7e1fdefa28)

8 years agoARM64: dts: rk3399: add vcodec power domain resource
Alpha Lin [Wed, 1 Jun 2016 08:19:31 +0000 (16:19 +0800)]
ARM64: dts: rk3399: add vcodec power domain resource

Change-Id: I9c7f7fd7189bdef607bd5dd2e457aa89f58c18bf
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
8 years agorockchip/vcodec: add pm runtime operation
Alpha Lin [Wed, 1 Jun 2016 08:13:44 +0000 (16:13 +0800)]
rockchip/vcodec: add pm runtime operation

Change-Id: Id7ec05cd50ae33081bcbc93a560e63153af15c4b
Signed-off-by: Alpha Lin <alpha.lin@rock-chips.com>
8 years agoARM64: dts: rk3399: android: Enable rga device
Zhiqin Wei [Wed, 1 Jun 2016 05:51:30 +0000 (13:51 +0800)]
ARM64: dts: rk3399: android: Enable rga device

Change-Id: I4247a242683f7b7f1124e720fdfe82317b915b21
Signed-off-by: Zhiqin Wei <wzq@rock-chips.com>
8 years agoarm64: configs: update rockchip config by savedefconfig
Huang, Tao [Wed, 1 Jun 2016 06:08:41 +0000 (14:08 +0800)]
arm64: configs: update rockchip config by savedefconfig

After mali driver upgrade, there are not MALI_MIDGARD_DEBUG_SYS
any more.

Change-Id: I8ecefb576b91faf9c366bf5dd3e2b4d4613d654c
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
8 years agocamsys driver: v0.0x21.2: compatible with kernel4.4
dalon.zhang [Wed, 18 May 2016 02:18:05 +0000 (10:18 +0800)]
camsys driver: v0.0x21.2: compatible with kernel4.4

Change-Id: Iaecb657f51729571e4b19445e2abcf42f50cc30f
Signed-off-by: dalon.zhang <dalon.zhang@rock-chips.com>
8 years agophy: rockchip-emmc: Fix the macro for ctrl_base.
Ziyuan Xu [Wed, 1 Jun 2016 01:16:19 +0000 (09:16 +0800)]
phy: rockchip-emmc: Fix the macro for ctrl_base.

Revise the value of macro which is belong to ctrl_base register.

Change-Id: Ic0943b233d4244dadf42d09343136aae012ac1b4
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
8 years agoUPSTREAM: ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs
Caesar Wang [Fri, 22 Jan 2016 11:06:49 +0000 (19:06 +0800)]
UPSTREAM: ARM: dts: rockchip: add arm,pl330-broken-no-flushp quirk for rk3036 SoCs

Pl330 integrated in rk3036 platform that doesn't support
DMAFLUSHP function. So we add 'arm,pl330-broken-no-flushp' quirk
for rk3036.

Change-Id: Ia70cb7041a0ecb172035a02b507d3713f18aaab9
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 29f12bbab4c3997c5c8879ea19cfc47440dedbd8)

8 years agoUPSTREAM: ARM: dts: rockchip: move rk3036 memory definition to board files
Heiko Stuebner [Wed, 30 Mar 2016 15:33:24 +0000 (17:33 +0200)]
UPSTREAM: ARM: dts: rockchip: move rk3036 memory definition to board files

The amount of available memory is clearly a board-specific value, so
the core per-soc dtsi should not define a default of any sort.
Therefore move the memory-nodes to the two board files.

Also fix the amount of memory on Kylin (512MB instead of 1GB).
While in most cases the bootloader will override this with the
actual amount of memory, there is no need to keep known wrong values
in the board-dts.

Change-Id: I01645bb5a371b75b3cd3e044200b303b24f3709e
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit fbf15046f12d6c8d5821c0dc5bf3ffc55a132243)

8 years agoUPSTREAM: ARM: dts: rockchip: remove broken-cd from emmc and sdio
Shawn Lin [Tue, 26 Jan 2016 02:06:43 +0000 (10:06 +0800)]
UPSTREAM: ARM: dts: rockchip: remove broken-cd from emmc and sdio

Only one of "broken-cd" and "non-removable" should be supplied
according to Documentation/devicetree/bindings/mmc/mmc.txt.
Obviously emmc and sdio-wifi are non-removable devices, while
broken-cd is for removable device whose card detect pin is broken.

Change-Id: I4be26d4bc14faefa9ff81fcabada0a768419108f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master commit
 57375d88fa3f6bf9351051529464c708f72adb1d)
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
8 years agoUPSTREAM: ARM: dts: rockchip: enable graphics support on rk3036-kylin
Caesar Wang [Tue, 2 Feb 2016 03:40:50 +0000 (11:40 +0800)]
UPSTREAM: ARM: dts: rockchip: enable graphics support on rk3036-kylin

Enable the recently added vop and hdmi nodes on the rk3036-kylin board.

Change-Id: Ic5207b6976bd1de064343ba23aab958a75a702bb
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit cef0abefa146877019e63c4e6ae439d40d01804f)

8 years agoUPSTREAM: ARM: dts: rockchip: add hdmi device node for rk3036
Caesar Wang [Tue, 2 Feb 2016 03:40:50 +0000 (11:40 +0800)]
UPSTREAM: ARM: dts: rockchip: add hdmi device node for rk3036

Add the Innosilicon hdmi node for HDMI display.

Change-Id: Ibe9f10fa44a7d2ecfde14c8855ab5dfccaa03f75
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit b7217cf19c633dc542ba4980f8fa34933ca1d343)

8 years agoUPSTREAM: ARM: dts: rockchip: add vop device node for rk3036
Caesar Wang [Tue, 2 Feb 2016 03:40:50 +0000 (11:40 +0800)]
UPSTREAM: ARM: dts: rockchip: add vop device node for rk3036

The rk3036 support two overlay plane and one hwc plane,
it supports IOMMU, and its IOMMU same as rk3288's.

Change-Id: I1d60350c0c422c6fd01725a5926e0c2b15e0240a
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit d9abae3ca5e8fa30fe5074aafd52a5bdfb8b2ed8)

8 years agoUPSTREAM: ARM: dts: rockchip: add to support emac for rk3036 SoCs
Xing Zheng [Mon, 14 Mar 2016 08:02:00 +0000 (16:02 +0800)]
UPSTREAM: ARM: dts: rockchip: add to support emac for rk3036 SoCs

This patch adds the emac device node for rk3036 SoCs.
We need to let mac clock under the DPLL which is able to provide
the accurate 50MHz what mac_ref need, since that will cause some
unstable things if the cpufreq is working.

Change-Id: Ie6fdbcda7d45cccbc23e1554141cc3c73b554818
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit af671e7bd96bc9bde623b0e6f75bfa4269c2c57f)

8 years agoUPSTREAM: ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board
Xing Zheng [Fri, 29 Jan 2016 08:49:21 +0000 (16:49 +0800)]
UPSTREAM: ARM: dts: rockchip: increase the mclk_fs to 512 for kylin board

If we playback the 8KHz FS audio with the 256 mclk_fs, we need the
mclk = 256 * 8000 = 2.048MHz, the frac div is 594 / 2.048 = 290,
the frac div value 0x00809015 set to the CRU_CLKSEL7_CON will cause
to hang.

We increase the mclk_fs to 512, will get the mclk = 512 * 8000 =
4.096MHz, use 0x01009015 instead of 0x00809015 to work around this
issue. We will keep tracking it.

Change-Id: I1fd36449bb5b3d6e35b9cd7b8c3165736123515f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit f6bb9d5f30d6986c4fdce1ed5a36088a0c30c544)

8 years agoUPSTREAM: ARM: dts: rockchip: support the spi for rk3036
Caesar Wang [Tue, 2 Feb 2016 03:40:53 +0000 (11:40 +0800)]
UPSTREAM: ARM: dts: rockchip: support the spi for rk3036

This patch adds the needed spi node for rk3036 dts.

We have to use the 4 bus emmc to work if someone want to support
the spi devices, since the pins are re-used by emmc data[5-8] and spi.
In some caseswe need to support the spi devices, that will waste the
emmc performance.

Moment, the kylin/evb hasn't the spi devices to work, so maybe we need wait
the new required to enable in kylin/evb board.

Anyway, the spi should be needed land in rk3036 dts.

Change-Id: I5bace7efcc2aa214be22a9b3009440c053b4c5e7
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit f629fcfab2cd8a2f1a571fbc83e76a81ee3470db)

8 years agoUPSTREAM: ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board
Caesar Wang [Tue, 2 Feb 2016 03:40:52 +0000 (11:40 +0800)]
UPSTREAM: ARM: dts: rockchip: add mclk for rt5616 on rk3036 kylin board

The I2S block that provide the output clock as the mclk for rt5616,
That will be the master clock input.

Change-Id: Ia5d126c24aa7a869e667f5280d40a6a1977cd4a0
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 8f338ecf0cd47d94303d9b4d9b2f9a99944ef0e2)

8 years agoUPSTREAM: ARM: dts: rockchip: add the leds control for rk3036-kylin board
Caesar Wang [Thu, 28 Jan 2016 08:43:30 +0000 (16:43 +0800)]
UPSTREAM: ARM: dts: rockchip: add the leds control for rk3036-kylin board

As the kylin schematic drawing, add the needed work led for
kylin board.

Run:
echo 0 > /sys/class/leds/kylin:red:led/brightness
echo 1 > /sys/class/leds/kylin:red:led/brightness

The led can normal on/off on kylin board.

Change-Id: I409d2d0f9561396138e5fc8249f9570249f29784
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit fe253133728cce8793c4390c943b5b46d073d5e4)

8 years agoUPSTREAM: ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
Caesar Wang [Thu, 14 Jan 2016 01:08:41 +0000 (09:08 +0800)]
UPSTREAM: ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs

While drivers will bind to the generic compatible values, this enables
the use of more specialized drivers in the future, if the need arises.

Change-Id: Ifb5028f71140d6742de4c5af668c85b6835c3eb2
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 0082180c8dd22c3b813618882ec9629d94172214)

8 years agoUPSTREAM: ARM: dts: rockchip: add the sdmmc for kylin board
Caesar Wang [Fri, 15 Jan 2016 13:49:54 +0000 (21:49 +0800)]
UPSTREAM: ARM: dts: rockchip: add the sdmmc for kylin board

Although We can add the sdmmc node, shouldn't enable it.
Since the sdmmc is reusing the same pin with uart2.
Unfortunately, the uart2 is used by the debug port, so that will cause
the debug information can't display on console if enabling the sdmmc.

As we have supported the sdmmc (sd card) on hardware for kylin board.
So, maybe we can have the sdmmc node in kylin dts, not to enable it.

Anyway, you only need add the okay status if someone want to enable the
sdmmc.

e.g.
if you use the adb to debug with android os.
You can add the
status = "okay" to enable the sdmmc for sd card working.
The default status is disabling it.

Change-Id: I5b22571bbf81a43f3cb8f666be59596bbd3a5bfc
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 6cff705b2dd944a14768e6a63c0773831583488e)

8 years agoUPSTREAM: ARM: dts: rockchip: add the sdio power sequence for kylin board
Caesar Wang [Fri, 15 Jan 2016 13:49:53 +0000 (21:49 +0800)]
UPSTREAM: ARM: dts: rockchip: add the sdio power sequence for kylin board

This patch adds the sdio power sequence for kylin board.
The WLAN attached to a SDIO interface, wifi/bluetooth have
reset and power been needed to enable.

AFAIK, the simple power sequence provider sets a value for multiple GPIOs.
So the reset and power of WlAN chip can be handled in mmc power sequence.
On the module itself this is one of these, that should can be handled
by reset GPIOs in simple mmc power sequence.

The Bluetooth host wake is high active from bootup, this patch is also
set pinctrl bias as the default to enable the pull up in soc internal.

Change-Id: I422b0d2de86460c05239f1864322986abec59073
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 4a9d0b033702566cde2f33ed19ff9c8a90b7fe8f)

8 years agoUPSTREAM: ARM: dts: rockchip: enable the high speed on sdio for kylin board
Caesar Wang [Fri, 15 Jan 2016 13:49:52 +0000 (21:49 +0800)]
UPSTREAM: ARM: dts: rockchip: enable the high speed on sdio for kylin board

We want to the higher speed for wifi module working.

Bootup kernel log:
...
mmc_host mmc0: Bus speed (slot 0) = 37125000Hz (slot req 37500000Hz,
actual 37125000HZ div = 0)

or run 'cat /sys/kernel/debug/clk/clk_summary |grep phase -C 1' to check
Otherwise, the mmc0 will run 400khz defalult value to work.

Change-Id: Id3c9949f86df846e8d8ad65978030cfbef5fe1e4
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 99dc9fdc3105116b46273577e9641d7304b3046e)

8 years agoUPSTREAM: ARM: dts: rockchip: enable the uart0 for kylin board
Caesar Wang [Fri, 15 Jan 2016 13:49:51 +0000 (21:49 +0800)]
UPSTREAM: ARM: dts: rockchip: enable the uart0 for kylin board

This patch is enabling the uart0 for bluetooth module.

Change-Id: Iad636b38df4c2a1ba4551bc104a343ab4e8aa7c3
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 5d69fa0f27f5bdff449858a20b7f50f08b9f33d8)

8 years agoUPSTREAM: ARM: dts: rockchip: add the sound setup for rk3036-kylin board
Caesar Wang [Thu, 7 Jan 2016 08:25:45 +0000 (16:25 +0800)]
UPSTREAM: ARM: dts: rockchip: add the sound setup for rk3036-kylin board

The rk3036-kylin board uses a rt5616 audio codec connected to the i2s
and can use the simple card to tie everyting together.

Change-Id: I4d55574456457922862e6d534d5749cb339883a2
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 47bf3a5c9e2aadaa6bfdff151e139196f1334c06)

8 years agoUPSTREAM: ARM: dts: rockchip: swap i2s clock ordering on rk3036
Heiko Stuebner [Sat, 9 Jan 2016 02:18:51 +0000 (03:18 +0100)]
UPSTREAM: ARM: dts: rockchip: swap i2s clock ordering on rk3036

For sound setups using the simple-card mechanism, the main clock
(sysclk) is expected to be the first element. For the i2s-driver
itself it doesn't matter, as it uses named clocks, so we can just
swap them.

Change-Id: Ie3db65056547acefb9b2bb7b8c2459eb59f51e56
Reported-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 3860aa1ccfe01adb6c3fd09e880d812ceb408e5c)

8 years agoUPSTREAM: ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s
Caesar Wang [Thu, 7 Jan 2016 08:25:44 +0000 (16:25 +0800)]
UPSTREAM: ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s

Sometime will hang if you set the i2s pinctrl as the none setting.
Let's set the pinctrl as the default setting to enable the gpio bias.

Change-Id: I9a6cc57f15ffcfcae59f2c8cdb64fdda681f8977
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit f47553325ede35ecfb82311342452a8f0f27ad2e)

8 years agoUPSTREAM: ARM: dts: rockchip: add the kylin board for rk3036
Caesar Wang [Thu, 17 Dec 2015 14:21:50 +0000 (22:21 +0800)]
UPSTREAM: ARM: dts: rockchip: add the kylin board for rk3036

This patchset is the initiation version to try work
for kylin board.

Change-Id: I5d2f69932e17b9ffc93f56bbbe427be3493054c3
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 94cf32b97bbb043b99e914aacff1a6d7833daf58)

8 years agoUPSTREAM: ARM: dts: rockchip: add the sdio/sdmmc node for rk3036
Caesar Wang [Thu, 17 Dec 2015 14:21:49 +0000 (22:21 +0800)]
UPSTREAM: ARM: dts: rockchip: add the sdio/sdmmc node for rk3036

In general, the sdio/sdmmc is used by the wifi module
and sd card.

let's add the node for these function.

Change-Id: Icff812197ed5319ae23f5d0e479e6fe29a24ff03
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 187d7967a5ee630ae062fb543655e59d2f0f91fb)

8 years agoUPSTREAM: ARM: dts: rockchip: fix the pinctrl bias settings for rk3036
Xing Zheng [Thu, 17 Dec 2015 14:21:47 +0000 (22:21 +0800)]
UPSTREAM: ARM: dts: rockchip: fix the pinctrl bias settings for rk3036

The pinctrl gpio pull up/down is incorrect since the rk3036 SoCs
can't set the status in the internal.

We should keep the default status for enable the gpio status,
In fact, the pull_none is the disable the gpio pull up/down.

Change-Id: Ia1bf3038c121524cc5df4b9e76739be0b342e877
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 68556dd775ba928ec70ef7d43bc348b8704bc39f)

8 years agoUPSTREAM: ARM: dts: rockchip: add rk3036-evb board
Xing Zheng [Thu, 5 Nov 2015 07:39:52 +0000 (15:39 +0800)]
UPSTREAM: ARM: dts: rockchip: add rk3036-evb board

Initial release for rk3036 sdk board.

Change-Id: I87207623af8bc8252afa39b3741c0cd8e2e6e594
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit faef90f1a203f96796d5bc3c6225ee100ec70864)

8 years agoUPSTREAM: ARM: dts: rockchip: add core rk3036 dtsi
Xing Zheng [Thu, 5 Nov 2015 07:39:52 +0000 (15:39 +0800)]
UPSTREAM: ARM: dts: rockchip: add core rk3036 dtsi

Initial release for rk3036 shared dtsi.

Change-Id: I4d7c2ae38b242612e86db2943545eaacda3fd9c3
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit faea098e1808729e4785cdba3a3fc52fae49f1ab)

8 years agoUPSTREAM: ARM: rockchip: add support smp for rk3036
Heiko Stuebner [Wed, 4 Nov 2015 12:25:16 +0000 (20:25 +0800)]
UPSTREAM: ARM: rockchip: add support smp for rk3036

The dual-core Cortex A7 rk3036 is a bit special in that it does not allow
to control the actual powerdomain of the cpu cores, while the rest of the
smp-bringup like reset control and entry address handling stays the same.
Its bigger sibling, the quad-core rk3128 again allows powerdomain control.

So allow that case by introducing a separate smp-enable-method, that simply
disables powerdomain handling in the common code.

Change-Id: Ic076a585678e4c8439a6e74cd92e1a983f87f76b
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Xing Zheng <zhengxing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 9def7ccfe8d5b84d382cff83553dd6db72f61a23)

8 years agoUPSTREAM: net: arc: trivial: Replace comma with a semicolon
Marek Vasut [Wed, 25 May 2016 22:40:05 +0000 (00:40 +0200)]
UPSTREAM: net: arc: trivial: Replace comma with a semicolon

Fix a typo in the driver, replace comma with a semicolon at the end
of statement. While using comma is a legal C here and probably does
not even generate compiler warning, it was unlikely the intention.

Change-Id: I087d867b24a96d0c6c1fecd7065f4ee5cc86611c
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David S. Miller <davem@davemloft.net>
Cc: Caesar Wang <wxt@rock-chips.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 3424d9be8f09649e6290d066c5c3cccff1c0ce77)

8 years agoUPSTREAM: net: arc: trivial: cleanup the emac driver
Caesar Wang [Mon, 14 Mar 2016 08:01:55 +0000 (16:01 +0800)]
UPSTREAM: net: arc: trivial: cleanup the emac driver

This patch will make the driver more readability

The emac has the error and warnings if you run
'scripts/checkpatch.pl -f --subjective xxx' to check.

Let's clean up such trivial details.

Change-Id: Iecdd4afc6aab8bd5cce1440a70d53a1c31442335
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Jiri Kosina <trivial@kernel.org>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Alexander Kochetkov <al.kochet@gmail.com>
Cc: netdev@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 663713eb477b9b916426124d6f5d5c5e9db919cf)

8 years agoUPSTREAM: net: arc_emac: support the phy reset for emac driver
Caesar Wang [Mon, 14 Mar 2016 08:01:54 +0000 (16:01 +0800)]
UPSTREAM: net: arc_emac: support the phy reset for emac driver

This patch adds to support the emac phy reset.

Different boards may require different phy reset duration. Add property
phy-reset-duration for emac driver, so that the boards that need
a longer reset duration can specify it in their device tree.

Change-Id: I2a3f1b50e685251d4a6d61390c0c6dd63119f134
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: netdev@vger.kernel.org
Cc: Alexander Kochetkov <al.kochet@gmail.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 1bddd96cba03da0a14b3e5144e98c9a6ff17e983)

8 years agoUPSTREAM: net: arc_emac: fix sk_buff leak
Alexander Kochetkov [Tue, 9 Feb 2016 15:20:40 +0000 (18:20 +0300)]
UPSTREAM: net: arc_emac: fix sk_buff leak

EMAC could be disabled, while there is some sb_buff
in use. That buffers got lost for linux.

In order to reproduce run on device during active ethernet work:
    ifconfig eth0 down

Change-Id: I7bc8b140be0ea378bc63fd11c026dbaee3f4d042
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit b530b16413b7f99977ded50a3c4bebd2ea79c41b)

8 years agoUPSTREAM: net: arc_emac: reset txbd_curr and txbd_dirty pointers to zero
Alexander Kochetkov [Tue, 9 Feb 2016 15:20:39 +0000 (18:20 +0300)]
UPSTREAM: net: arc_emac: reset txbd_curr and txbd_dirty pointers to zero

EMAC reset internal tx ring pointer to zero at statup.
txbd_curr and txbd_dirty can be different from zero.
That cause ethernet transfer hang (no packets transmitted).

In order to reproduce, run on device:
    ifconfig eth0 down
    ifconfig eth0 up

Change-Id: Ie37cbd4761f8df216b2ddc5d07c0d6f036ac7092
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 99f93a156a2aa9ac1e44f7cb1a197425e6d9879a)

8 years agoUPSTREAM: net: arc_emac: fix koops caused by sk_buff free
Alexander Kochetkov [Tue, 9 Feb 2016 15:20:38 +0000 (18:20 +0300)]
UPSTREAM: net: arc_emac: fix koops caused by sk_buff free

There is a race between arc_emac_tx() and arc_emac_tx_clean().
sk_buff got freed by arc_emac_tx_clean() while arc_emac_tx()
submitting sk_buff.

In order to free sk_buff arc_emac_tx_clean() checks:
    if ((info & FOR_EMAC) || !txbd->data)
        break;
    ...
    dev_kfree_skb_irq(skb);

If condition false, arc_emac_tx_clean() free sk_buff.

In order to submit txbd, arc_emac_tx() do:
    priv->tx_buff[*txbd_curr].skb = skb;
    ...
    priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
    ...
    ...  <== arc_emac_tx_clean() check condition here
    ...  <== (info & FOR_EMAC) is false
    ...  <== !txbd->data is false
    ...
    *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);

In order to reproduce the situation,
run device:
    # iperf -s
run on host:
    # iperf -t 600 -c <device-ip-addr>

[   28.396284] ------------[ cut here ]------------
[   28.400912] kernel BUG at .../net/core/skbuff.c:1355!
[   28.414019] Internal error: Oops - BUG: 0 [#1] SMP ARM
[   28.419150] Modules linked in:
[   28.422219] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G    B           4.4.0+ #120
[   28.429516] Hardware name: Rockchip (Device Tree)
[   28.434216] task: c0665070 ti: c0660000 task.ti: c0660000
[   28.439622] PC is at skb_put+0x10/0x54
[   28.443381] LR is at arc_emac_poll+0x260/0x474
[   28.447821] pc : [<c03af580>]    lr : [<c028fec4>]    psr: a0070113
[   28.447821] sp : c0661e58  ip : eea68502  fp : ef377000
[   28.459280] r10: 0000012c  r9 : f08b2000  r8 : eeb57100
[   28.464498] r7 : 00000000  r6 : ef376594  r5 : 00000077  r4 : ef376000
[   28.471015] r3 : 0030488b  r2 : ef13e880  r1 : 000005ee  r0 : eeb57100
[   28.477534] Flags: NzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   28.484658] Control: 10c5387d  Table: 8eaf004a  DAC: 00000051
[   28.490396] Process swapper/0 (pid: 0, stack limit = 0xc0660210)
[   28.496393] Stack: (0xc0661e58 to 0xc0662000)
[   28.500745] 1e40:                                                       00000002 00000000
[   28.508913] 1e60: 00000000 ef376520 00000028 f08b23b8 00000000 ef376520 ef7b6900 c028fc64
[   28.517082] 1e80: 2f158000 c0661ea8 c0661eb0 0000012c c065e900 c03bdeac ffff95e9 c0662100
[   28.525250] 1ea0: c0663924 00000028 c0661ea8 c0661ea8 c0661eb0 c0661eb0 0000001e c0660000
[   28.533417] 1ec0: 40000003 00000008 c0695a00 0000000a c066208c 00000100 c0661ee0 c0027410
[   28.541584] 1ee0: ef0fb700 2f158000 00200000 ffff95e8 00000004 c0662100 c0662080 00000003
[   28.549751] 1f00: 00000000 00000000 00000000 c065b45c 0000001e ef005000 c0647a30 00000000
[   28.557919] 1f20: 00000000 c0027798 00000000 c005cf40 f0802100 c0662ffc c0661f60 f0803100
[   28.566088] 1f40: c0661fb8 c00093bc c000ffb4 60070013 ffffffff c0661f94 c0661fb8 c00137d4
[   28.574267] 1f60: 00000001 00000000 00000000 c001ffa0 00000000 c0660000 00000000 c065a364
[   28.582441] 1f80: c0661fb8 c0647a30 00000000 00000000 00000000 c0661fb0 c000ffb0 c000ffb4
[   28.590608] 1fa0: 60070013 ffffffff 00000051 00000000 00000000 c005496c c0662400 c061bc40
[   28.598776] 1fc0: ffffffff ffffffff 00000000 c061b680 00000000 c0647a30 00000000 c0695294
[   28.606943] 1fe0: c0662488 c0647a2c c066619c 6000406a 413fc090 6000807c 00000000 00000000
[   28.615127] [<c03af580>] (skb_put) from [<ef376520>] (0xef376520)
[   28.621218] Code: e5902054 e590c090 e3520000 0a000000 (e7f001f2)
[   28.627307] ---[ end trace 4824734e2243fdb6 ]---

[   34.377068] Internal error: Oops: 17 [#1] SMP ARM
[   34.382854] Modules linked in:
[   34.385947] CPU: 0 PID: 3 Comm: ksoftirqd/0 Not tainted 4.4.0+ #120
[   34.392219] Hardware name: Rockchip (Device Tree)
[   34.396937] task: ef02d040 ti: ef05c000 task.ti: ef05c000
[   34.402376] PC is at __dev_kfree_skb_irq+0x4/0x80
[   34.407121] LR is at arc_emac_poll+0x130/0x474
[   34.411583] pc : [<c03bb640>]    lr : [<c028fd94>]    psr: 60030013
[   34.411583] sp : ef05de68  ip : 0008e83c  fp : ef377000
[   34.423062] r10: c001bec4  r9 : 00000000  r8 : f08b24c8
[   34.428296] r7 : f08b2400  r6 : 00000075  r5 : 00000019  r4 : ef376000
[   34.434827] r3 : 00060000  r2 : 00000042  r1 : 00000001  r0 : 00000000
[   34.441365] Flags: nZCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment none
[   34.448507] Control: 10c5387d  Table: 8f25c04a  DAC: 00000051
[   34.454262] Process ksoftirqd/0 (pid: 3, stack limit = 0xef05c210)
[   34.460449] Stack: (0xef05de68 to 0xef05e000)
[   34.464827] de60:                   ef376000 c028fd94 00000000 c0669480 c0669480 ef376520
[   34.473022] de80: 00000028 00000001 00002ae4 ef376520 ef7b6900 c028fc64 2f158000 ef05dec0
[   34.481215] dea0: ef05dec8 0000012c c065e900 c03bdeac ffff983f c0662100 c0663924 00000028
[   34.489409] dec0: ef05dec0 ef05dec0 ef05dec8 ef05dec8 ef7b6000 ef05c000 40000003 00000008
[   34.497600] dee0: c0695a00 0000000a c066208c 00000100 ef05def8 c0027410 ef7b6000 40000000
[   34.505795] df00: 04208040 ffff983e 00000004 c0662100 c0662080 00000003 ef05c000 ef027340
[   34.513985] df20: ef05c000 c0666c2c 00000000 00000001 00000002 00000000 00000000 c0027568
[   34.522176] df40: ef027340 c003ef48 ef027300 00000000 ef027340 c003edd4 00000000 00000000
[   34.530367] df60: 00000000 c003c37c ffffff7f 00000001 00000000 ef027340 00000000 00030003
[   34.538559] df80: ef05df80 ef05df80 00000000 00000000 ef05df90 ef05df90 ef05dfac ef027300
[   34.546750] dfa0: c003c2a4 00000000 00000000 c000f578 00000000 00000000 00000000 00000000
[   34.554939] dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[   34.563129] dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 ffffffff dfff7fff
[   34.571360] [<c03bb640>] (__dev_kfree_skb_irq) from [<c028fd94>] (arc_emac_poll+0x130/0x474)
[   34.579840] [<c028fd94>] (arc_emac_poll) from [<c03bdeac>] (net_rx_action+0xdc/0x28c)
[   34.587712] [<c03bdeac>] (net_rx_action) from [<c0027410>] (__do_softirq+0xcc/0x1f8)
[   34.595482] [<c0027410>] (__do_softirq) from [<c0027568>] (run_ksoftirqd+0x2c/0x50)
[   34.603168] [<c0027568>] (run_ksoftirqd) from [<c003ef48>] (smpboot_thread_fn+0x174/0x18c)
[   34.611466] [<c003ef48>] (smpboot_thread_fn) from [<c003c37c>] (kthread+0xd8/0xec)
[   34.619075] [<c003c37c>] (kthread) from [<c000f578>] (ret_from_fork+0x14/0x3c)
[   34.626317] Code: e8bd8010 e3a00000 e12fff1e e92d4010 (e59030a4)
[   34.632572] ---[ end trace cca5a3d86a82249a ]---

Change-Id: I4cf163c76cd59ba94c314507b9c636c782edd18a
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit c278c253f3d992c6994d08aa0efb2b6806ca396f)

8 years agoUPSTREAM: net: ethernet: arc: Add support emac for RK3036
Xing Zheng [Fri, 8 Jan 2016 01:35:02 +0000 (09:35 +0800)]
UPSTREAM: net: ethernet: arc: Add support emac for RK3036

The RK3036's GRFs offset are different with RK3066/RK3188, and need to set
mac TX/RX clock before probe emac.

Change-Id: Ie1dd5412c1858f7db007a06122f055790fa6fe2f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit af72261f33ee4958bb53e299746014f44e1134c4)

8 years agoUPSTREAM: net: ethernet: arc: Keep emac compatibility for more Rockchip SoCs
Xing Zheng [Fri, 8 Jan 2016 01:35:01 +0000 (09:35 +0800)]
UPSTREAM: net: ethernet: arc: Keep emac compatibility for more Rockchip SoCs

On the RK3066/RK3188, there was fixed GRF offset configuration to set emac
and fixed DIV2 mac TX/RX clock. So, we need to easily set and fit to other
SoCs (RK3036) which maybe have different GRF offset, and need adjust mac
TX/RX clock.

Change-Id: Ic130da39af5cc585974c9231f80472fa2a15a29b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit f4c9d3ee0334fd9c6c8f2c3a8bd7d0841880e127)

8 years agoUPSTREAM: net: ethernet: arc: Probe emac after set RMII clock
Xing Zheng [Fri, 8 Jan 2016 01:35:00 +0000 (09:35 +0800)]
UPSTREAM: net: ethernet: arc: Probe emac after set RMII clock

After enter arc_emac_probe, emac will get_phy_id, phy_poll_reset and
other connecting PHY via mdiobus_read, so we need to set correct
ref clock rate for emac before probe emac.

Change-Id: Iffaa7a60efcfcadded803df7c0b20e5a2422d646
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from commit c9bca2fe3ca6d6dac2a27eb8619955648369efed)

8 years agoBACKPORT: dmaengine: pl330: add quirk for broken no flushp
Addy Ke [Fri, 22 Jan 2016 11:06:46 +0000 (19:06 +0800)]
BACKPORT: dmaengine: pl330: add quirk for broken no flushp

This patch add "arm,pl330-broken-no-flushp" quirk to avoid execute
DMAFLUSHP if Soc doesn't support it.

Conflicts:
drivers/dma/pl330.c
(Note: Instead of the order with
"dmaengine: pl330: support burst mode for dev-to-mem and mem-to-dev transmit")

Change-Id: Ibec534f102147bb9ab7fc62045d474ad548595df
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
cc: Doug Anderson <dianders@chromium.org>
cc: Heiko Stuebner <heiko@sntech.de>
cc: Olof Johansson <olof@lixom.net>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 271e1b86e69140fe65718ae8a264284c46d3129d)

8 years agoUPSTREAM: clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036
Heiko Stuebner [Mon, 14 Mar 2016 08:01:59 +0000 (16:01 +0800)]
UPSTREAM: clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036

The emac needs constant and very specific rate but the possible PLL-sources
are very limited, so we expect the PLL source to be set manually on per
board and don't want it to get changed in an automatic way later.
So add the necessary clock-id and disable reparenting on set_rate calls.

Change-Id: I999ba51df51fef50075eb119e3b976b990fe714c
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 2c6fae2501d87ca94b5249df38797f02d4e39add)

8 years agoUPSTREAM: clk: rockchip: associate the rk3036 HCLK_EMAC clock-id
Xing Zheng [Mon, 14 Mar 2016 08:01:57 +0000 (16:01 +0800)]
UPSTREAM: clk: rockchip: associate the rk3036 HCLK_EMAC clock-id

Associate the new clock id the clock.

Change-Id: Ib67b0a61a125564a8efd43dab0350826080367a5
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit e764b93924b47cd53b818c1cf8708a35bdfbb83d)

8 years agoUPSTREAM: clk: rockchip: fix parent of hclk_vcodec on rk3036
Heiko Stuebner [Wed, 27 Jan 2016 20:38:37 +0000 (21:38 +0100)]
UPSTREAM: clk: rockchip: fix parent of hclk_vcodec on rk3036

hclk_vcodec is a child of aclk_vcodec with the fixed factor clock
hclk_vcodec_pre in between and not a child of hclk_disp_pre.

Change-Id: I0298d0a1adef3cc0f9aa6e759947c8f90c4c252f
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit aebe3ad801ebbcd90b3649c24ae0e90d2db8bde8)

8 years agoUPSTREAM: clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for hclk_vio_bus
Yakir Yang [Fri, 15 Jan 2016 11:54:14 +0000 (19:54 +0800)]
UPSTREAM: clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for hclk_vio_bus

HCLK_VIO_BUS is the noc bus controller clock for display module,
due to it shouldn't belong to any driver, but we need it enabled,
so just mark it as the CLK_IGNORE_UNUSED flag.

Change-Id: I041bb98d71ad7d5f04e92b44a6fef850c8007c47
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit ee16bbd289a63e3036d31dcd809e411e9a5dbd5d)

8 years agoUPSTREAM: clk: rockchip: rk3036: rename emac ext source clock
Xing Zheng [Thu, 7 Jan 2016 12:17:36 +0000 (20:17 +0800)]
UPSTREAM: clk: rockchip: rk3036: rename emac ext source clock

There is only support rmii in the RK3036, so we should use the correct
ext clock name as described in the TRM.

Change-Id: Idf1ba727690f364f7705f15a8dac1b570c773044
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
[update dt-binding document as well]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 01b4557d30e95c64cfdc96025e75207647524ec2)

8 years agoUPSTREAM: clk: rockchip: rk3036: fix the div offset for emac clock
Xing Zheng [Thu, 7 Jan 2016 12:17:35 +0000 (20:17 +0800)]
UPSTREAM: clk: rockchip: rk3036: fix the div offset for emac clock

Due to reference to old version TRM, there are incorrect emac clock node.
The SEL_21_9 is used for the parent div, the SEL_21_4 is used for the
child div.

Change-Id: Iac08a99fc8c5420e31e68520f24875b179e3665a
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit c40519350e1d7db03e35e57509352c55948648ba)

8 years agoUPSTREAM: clk: rockchip: rk3036: fix uarts clock error
Xing Zheng [Thu, 7 Jan 2016 12:17:34 +0000 (20:17 +0800)]
UPSTREAM: clk: rockchip: rk3036: fix uarts clock error

Due to a copy-paste error the uart1 and uart2 clock div set
incorrect, fix it.

Change-Id: Ia15ba135eec824bb2e0f79e3a40c4bbfab544f11
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit b29de2de5049e064d172862b1feeddeb650c3ee8)

8 years agoUPSTREAM: clk: rockchip: rk3036: fix the FLAGs for clock mux
Xing Zheng [Thu, 7 Jan 2016 12:17:33 +0000 (20:17 +0800)]
UPSTREAM: clk: rockchip: rk3036: fix the FLAGs for clock mux

The DFLAGS are used for the clock dividers, the CLKSEL_CON flags
of COMPOSITE_NODIV type should be MFLAGS.

Change-Id: Ieca6e3a982487799e546e3537ce1f94471f71738
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 99222c9e4de7feb22c93b19a92b35fcdad73ed42)

8 years agoUPSTREAM: clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for aclk_vio
Yakir Yang [Wed, 16 Dec 2015 08:27:18 +0000 (16:27 +0800)]
UPSTREAM: clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for aclk_vio

ACLK_VIO is the noc bus clock for display module, display cann't
read data from ddr without this clock enabled.

Due to it shouldn't belong to any driver, but we need it enabled,
so just mark it as the CLK_IGNORE_UNUSED flag.

Change-Id: Icd9742e3741bb460e530a4704f1719837c8292bd
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 2abc02fc494fa4c920a08a1d0beecabafbcb2104)

8 years agoUPSTREAM: clk: rockchip: add clock-id for rk3036 emac pll source clock
Xing Zheng [Mon, 14 Mar 2016 08:01:58 +0000 (16:01 +0800)]
UPSTREAM: clk: rockchip: add clock-id for rk3036 emac pll source clock

Suitable PLLs for the emac on the rk3036 are difficult to find
and one of them is the (continuously changing) APLL. So in most
cases it will be necessary to select a PLL manually.
So add a clock-id for it.

Change-Id: Ic7e1c870744342c282ba2d86ae61650476b336e1
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit f7e180222b973a0b363564b281a314276cb2b594)

8 years agoUPSTREAM: clk: rockchip: add node-id for rk3036 emac hclk
Xing Zheng [Mon, 14 Mar 2016 08:01:56 +0000 (16:01 +0800)]
UPSTREAM: clk: rockchip: add node-id for rk3036 emac hclk

Add the node-id for the emac hclk to the binding header.

Change-Id: I985b5eae1276f3393536fa59b1821eff6ccc154b
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Xing Zheng <zhengxing@rock-chips.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit fb781c8e2a370d67acf7b8a8826e6f5e3ae1d7c6)

8 years agoARM: dts: rk3036: remove the old rk3036 dts
Caesar Wang [Mon, 30 May 2016 06:28:11 +0000 (14:28 +0800)]
ARM: dts: rk3036: remove the old rk3036 dts

The original rk3036.dtsi is suit for the kernel 3.10 develop,
So I should remove or rename it with insteading of upstream dts.

Change-Id: Ib45129573c5a6240a9f356be98186946a61b3f3f
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
8 years agoMALI: rockchip: not to use sg_dma_len in midgard ddk r11p0-00rel0
chenzhen [Thu, 14 Apr 2016 02:17:36 +0000 (10:17 +0800)]
MALI: rockchip: not to use sg_dma_len in midgard ddk r11p0-00rel0

When CONFIG_NEED_SG_DMA_LENGTH is enabled,
sg_dma_len is defined as follow :
"#define sg_dma_len(sg)             ((sg)->dma_length)"
But, dma_length is not used by the framework indeed.

Change-Id: I51d1adf9f2738b1036fdaf6172ae932c007fac76
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
8 years agoMALI: rockchip: upgrade midgard DDK to r11p0-00rel0
chenzhen [Tue, 5 Apr 2016 08:53:38 +0000 (16:53 +0800)]
MALI: rockchip: upgrade midgard DDK to r11p0-00rel0

Conflicts:

drivers/gpu/arm/midgard/mali_kbase_core_linux.c
drivers/gpu/arm/midgard/mali_kbase_jd.c

Change-Id: I9c910f2b08ffd2e9101fbe85958030ac7bca1642
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
8 years agoMALI: rockchip: upgrade midgard DDK to r9p0-05rel0
chenzhen [Fri, 19 Feb 2016 08:58:15 +0000 (16:58 +0800)]
MALI: rockchip: upgrade midgard DDK to r9p0-05rel0

Conflicts:

drivers/gpu/arm/midgard/Kconfig

Change-Id: Ib7975ebe959624bedd92f126768987f2e2f0f84b
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
8 years agoARM64: rockchip_cros_defconfig: remove Rogue of G6110 GPU
chenzhen [Mon, 30 May 2016 12:48:16 +0000 (20:48 +0800)]
ARM64: rockchip_cros_defconfig: remove Rogue of G6110 GPU

Change-Id: Idfb8c61a5734e36731f2c9ba192bbb160301e701
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
8 years agommc: dw_mmc: check card present before starting request
Shawn Lin [Fri, 27 May 2016 07:42:35 +0000 (15:42 +0800)]
mmc: dw_mmc: check card present before starting request

The main reason to add this check is to avoid unnecessary
mmc_request like the on-going cmd and the corresponding sbc
if the card is removed. Although we have already checked this in
dw_mci_handle_cd for runtime usage of sd card and dw_mci_init_slot
for noremovable devices, but there is a timing gap before it really
calls dw_mci_get_cd as mmc_detect_change needs some delay here.

Another gain here is that we could save some checkings of card status
after sd card been removed.

Change-Id: Iea741c1c72985fbe078f48da3796bddcab816e66
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
8 years agommc: dw_mmc: remove redundant of set_bit and clear_bit
Shawn Lin [Fri, 27 May 2016 07:40:08 +0000 (15:40 +0800)]
mmc: dw_mmc: remove redundant of set_bit and clear_bit

dw_mci_get_cd have already dealt with these for
both of internal card-detect and gpio card-detect.

Change-Id: I59eb591d2dace127bae3520d7920056d704ed1e6
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
8 years agommc: dw_mmc-rockchip: add MMC_CAP_CMD23 capabilities
Shawn Lin [Fri, 27 May 2016 07:37:21 +0000 (15:37 +0800)]
mmc: dw_mmc-rockchip: add MMC_CAP_CMD23 capabilities

Add MMC_CAP_CMD23 for dw_mmc-rockchip, otherwise
failing to create rpmb partition. With it, we can
get rpmb successfully:

mmc1: new HS200 MMC card at address 0001
mmcblk0: mmc1:0001 DS2016 14.7 GiB
mmcblk0boot0: mmc1:0001 DS2016 partition 1 4.00 MiB
mmcblk0boot1: mmc1:0001 DS2016 partition 2 4.00 MiB
mmcblk0rpmb: mmc1:0001 DS2016 partition 3 4.00 MiB

Change-Id: I19cdb2d31ee8c864125c2bd197e38cf21b84e25f
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
8 years agommc: dw_mmc: Consider HLE errors to be data and command errors
Shawn Lin [Fri, 27 May 2016 07:35:40 +0000 (15:35 +0800)]
mmc: dw_mmc: Consider HLE errors to be data and command errors

The dw_mmc driver enables HLE errors as part of DW_MCI_ERROR_FLAGS but
nothing in the interrupt handler actually handles them and ACKs them.
That means that if we ever get an HLE error we'll just keep getting
interrupts and we'll wedge things.

We really don't expect HLE errors but if we ever get them we shouldn't
silently ignore them.

Note that I have seen HLE errors while constantly ejecting and
inserting cards (ejecting while inserting, etc).

Change-Id: I95fcc4e2d657572b365980794bb941ea39403699
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
8 years agommc: core: Fix HS switch failure in mmc_select_hs400
Shawn Lin [Fri, 27 May 2016 06:57:25 +0000 (14:57 +0800)]
mmc: core: Fix HS switch failure in mmc_select_hs400

We should change HS400 mode selection timing to meet JEDEC
specification. The JEDEC 5.1 said that change the frequency to <= 52MHZ
after HS_TIMING switch. Refer to section 6.6.2.3 "HS400" timing mode
selection:

Set the "Timing Interface" parameter in the HS_TIMING[185] field of the
Extended CSD register to 0x1 to switch to High Speed mode and then set
the clock frequency to a value not greater than 52MHZ.

Change-Id: Ia676b8e3ea4a66867372c9719d768a6d4405ff15
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
8 years agommc: core: don't check card status when flushing cache
Shawn Lin [Fri, 27 May 2016 06:54:50 +0000 (14:54 +0800)]
mmc: core: don't check card status when flushing cache

It's meaningless to check the card's status which execute
the on-going flush. As the status been responsed make no
any sense here.

Change-Id: I34197d1c93c01337dd2e68ec22e3ce8dd195c424
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
8 years agommc: core: keep consistent with upstream
Shawn Lin [Tue, 10 May 2016 04:11:16 +0000 (12:11 +0800)]
mmc: core: keep consistent with upstream

Manually merge hs400es from upstream to avoid
too much rework.

Change-Id: I69821c866ba38ead929f437a16618694d92d470c
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
8 years agoARM64: dts: rk3399: pd: Add gpu pd nodes
Elaine Zhang [Fri, 27 May 2016 10:35:09 +0000 (18:35 +0800)]
ARM64: dts: rk3399: pd: Add gpu pd nodes

Change-Id: I7f89e721f93a750676aab966e400a4b522992cfc
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
8 years agoARM64: dts: rk3399: pd: Add vopl\vopb\mipi\hdmi pd nodes
Elaine Zhang [Fri, 27 May 2016 08:30:54 +0000 (16:30 +0800)]
ARM64: dts: rk3399: pd: Add vopl\vopb\mipi\hdmi pd nodes

Change-Id: Iff66cf997896d34111706f884a32e82f44e21d6f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
8 years agoARM64: dts: rk3399: pd: enable the pd node by default
Elaine Zhang [Fri, 27 May 2016 02:53:09 +0000 (10:53 +0800)]
ARM64: dts: rk3399: pd: enable the pd node by default

1 Remove pd_center because the ddr not allowed to power off the pd_center.
2 If the driver not used the pd. the pd will be offed after genpd init complete.
(pd disable unused)

Change-Id: I66db4df1835a48e3c0f96019bb727994e2516af9
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
8 years agoARM64: rockchip_defconfig: enable Rockchip Inno usb2phy driver
Frank Wang [Tue, 3 May 2016 07:50:42 +0000 (15:50 +0800)]
ARM64: rockchip_defconfig: enable Rockchip Inno usb2phy driver

Change-Id: Ib756e79dac8be3b509f261818ce8e1dc5bd41309
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
8 years agoARM64: dts: rockchip: rk3366: support for the usb2phy driver
Frank Wang [Fri, 29 Apr 2016 03:37:01 +0000 (11:37 +0800)]
ARM64: dts: rockchip: rk3366: support for the usb2phy driver

Change-Id: I0f4b09a41d249997f4c881238101a94a48fd737d
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
8 years agophy: rockchip-inno-usb2: add a new driver for Rockchip usb2phy
Frank Wang [Thu, 28 Apr 2016 07:43:16 +0000 (15:43 +0800)]
phy: rockchip-inno-usb2: add a new driver for Rockchip usb2phy

The newer SoCs (rk3366, rk3399) take a different usb-phy IP block (INNO)
than rk3288 and before, meanwhile, most of phy-related registers are also
different from the past, so a new phy driver is required necessarily.

Change-Id: I32320fd516af146ef9b7816d5b167e1b682a659b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
8 years agoDocumentation: bindings: add DT documentation for Rockchip USB2PHY
Frank Wang [Thu, 28 Apr 2016 06:31:30 +0000 (14:31 +0800)]
Documentation: bindings: add DT documentation for Rockchip USB2PHY

Change-Id: I67f4612e95279fabe30aa63f803cd83921b04bd7
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
8 years agoMerge tag 'lsk-v4.4-16.05-android'
Huang, Tao [Mon, 30 May 2016 06:24:17 +0000 (14:24 +0800)]
Merge tag 'lsk-v4.4-16.05-android'

LSK 16.05 v4.4-android

8 years agoARM64: dts: rockchip: enable tsadc node for rk3366-tb
Rocky Hao [Mon, 30 May 2016 01:53:29 +0000 (09:53 +0800)]
ARM64: dts: rockchip: enable tsadc node for rk3366-tb

Set status of tsadc node to "okay" to make tsadc work.

Change-Id: I741adc9ce611f6f0f279fbb351dfaa5fc947db06
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
8 years agoarm64: dts: rockchip: add tsadc node and the IPA parameters for rk3366 thermal
Rocky Hao [Thu, 10 Mar 2016 10:51:27 +0000 (18:51 +0800)]
arm64: dts: rockchip: add tsadc node and the IPA parameters for rk3366 thermal

according to our testing results, added the ipa parameters for both cpu
and gpu.

for now,the gpu thermal zone is used only to get the gpu's temperature.

Change-Id: I14274c0b2d7645d08f37d918ddb415ac49ed0d9e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
8 years agoUPSTREAM: clk: rockchip: add a dummy clock for the watchdog pclk on rk3399
Xing Zheng [Wed, 25 May 2016 08:51:56 +0000 (16:51 +0800)]
UPSTREAM: clk: rockchip: add a dummy clock for the watchdog pclk on rk3399

Like rk3288, the pclk supplying the watchdog is controlled via the
SGRF register area. Additionally the SGRF isn't even writable in
every boot mode.

But still the clock control is available and in the future someone
might want to use it. Therefore define a simple clock for the time
being so that the watchdog driver can read its rate.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit git.kernel.org mmind/linux-rockchip.git
volatile-v4.8-clk/next e3d86c1a2295184374cf25cdb525e68a93b0ff90)

Change-Id: I616846d389d324be529966c63820e8707c7d428f
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
8 years agoUPSTREAM: clk: rockchip: fix cpuclk registration error handling
Xing Zheng [Thu, 26 May 2016 13:49:08 +0000 (21:49 +0800)]
UPSTREAM: clk: rockchip: fix cpuclk registration error handling

It maybe due to a copy-paste error the error handing should be
cclk not clk when checking if the cpuclk registration succeeded.

Reported-by: Lin Huang <lin.huang@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/fixes commit df43cf8f1c116f26fcfd89ce9b1119929c732597)

Change-Id: I7d21808194c914e9117c498309e4b69861799318
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
8 years agoARM64: config: rockchip_defconfig: make ipa work as default config
Rocky Hao [Thu, 26 May 2016 05:01:17 +0000 (13:01 +0800)]
ARM64: config: rockchip_defconfig: make ipa work as default config

Change-Id: Ib82b0102b9b14aeb1f44e60f12451cac32b75acc
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
8 years agoarm64: dts: rockchip: add the IPA needed parameters for rk3399 thermal
Rocky Hao [Thu, 26 May 2016 04:48:33 +0000 (12:48 +0800)]
arm64: dts: rockchip: add the IPA needed parameters for rk3399 thermal

according to our testing results, added the ipa parameters for both cpu
big cores and cpu little cores, and updated the  parameters for gpu.

for now,the gpu thermal zone is used only to get the gpu's temperature.

Change-Id: Ifc7708de9d880e0f9cd5da0bb71a135b0c381b45
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
8 years agoARM64: dts: rockchip: add pstore node for rk3366-tb
David Wu [Thu, 26 May 2016 06:03:15 +0000 (14:03 +0800)]
ARM64: dts: rockchip: add pstore node for rk3366-tb

Change-Id: I7120fe883faa60d95ad1c93e6bbb774116bdcbef
Signed-off-by: David Wu <david.wu@rock-chips.com>
8 years agovideo: rockchip: hdmi: add power domain control
xuhuicong [Wed, 25 May 2016 11:15:27 +0000 (19:15 +0800)]
video: rockchip: hdmi: add power domain control

grf_soc_con20 will be reset when vio pd close, so we have to
set hdmi source everytime wake up

Change-Id: I84597265238c1d3057002aad63a0f9b64b99f704
Signed-off-by: xuhuicong <xhc@rock-chips.com>
8 years agovideo: rockchip: mipi: add dual mipi support
xubilv [Tue, 24 May 2016 03:29:22 +0000 (11:29 +0800)]
video: rockchip: mipi: add dual mipi support

Change-Id: I03ad19d66dc2ee7bd926b01023425fed489ab944
Signed-off-by: xubilv <xbl@rock-chips.com>
8 years agovideo: rockchip: fb: add parse screen physical size
Huang Jiachai [Wed, 30 Mar 2016 07:21:43 +0000 (15:21 +0800)]
video: rockchip: fb: add parse screen physical size

Change-Id: I98ad62b55d268150ff256407b6bdf06a8ad14a37
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>
8 years agoARM64: dts: rk3399: clk: set armclkb 816M when clk init
Elaine Zhang [Wed, 25 May 2016 06:35:42 +0000 (14:35 +0800)]
ARM64: dts: rk3399: clk: set armclkb 816M when clk init

set armclkb 816M to slove the crash,which reset core voltage below 0.85V.
So make sure the 0.8V voltage is enough for the init clk freq.

Change-Id: I4dba25fdfd610c0751f50ce09283c32a9b3f420f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
8 years agoUPSTREAM: ASoC: rockchip: i2s: rename I2S_CKR_TRCM_TX/RXSHARE to I2S_CKR_TRCM_TX...
Sugar Zhang [Tue, 24 May 2016 03:47:46 +0000 (11:47 +0800)]
UPSTREAM: ASoC: rockchip: i2s: rename I2S_CKR_TRCM_TX/RXSHARE to I2S_CKR_TRCM_TX/RXONLY

this patch make it more reasonable and readable, because when we chose
I2S_CKR_TRCM_TXONLY, we only output clk_lrck_tx, and hardware need to
confirm this signal is wired to external codec lrck_tx/rx at the same time.

for convenience, we just handle lrck_txonly if we enable symmetric_rates
in driver and dai_link. otherwise, we use the separate lrck_tx/rx.

Change-Id: I383c34d2337715148566f7e2ada367f2ee279cb5
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from git.kernel.org broonie/sound.git topic/rockchip
 commit 7ec4a1c34a190297540626dfa240dc033beca196)

8 years agocpufreq: dt: fix resume warning
Huang, Tao [Tue, 24 May 2016 07:12:53 +0000 (15:12 +0800)]
cpufreq: dt: fix resume warning

This is workaround, but it fix this warning when rk3399 resume:

Detected PIPT I-cache on CPU4
CPU4: found redistributor 100 region 0:0x00000000fef80000
CPU4: Booted secondary processor [410fd082]
cpu cpu4: opp_list_debug_create_link: Failed to create link
cpu cpu4: _add_opp_dev: Failed to register opp debugfs (-12)
cpu cpu5: opp_list_debug_create_link: Failed to create link
cpu cpu5: _add_opp_dev: Failed to register opp debugfs (-12)
CPU4 is up
Detected PIPT I-cache on CPU5
CPU5: found redistributor 101 region 0:0x00000000fefa0000
CPU5: Booted secondary processor [410fd082]
------------[ cut here ]------------
WARNING: at drivers/base/power/opp/core.c:1452

CPU: 2 PID: 564 Comm: system_server Not tainted 4.4.10 #194
Hardware name: Rockchip RK3399 Evaluation Board v2 (Android) (DT)
task: ffffffc0e71fec00 ti: ffffffc0dbe10000 task.ti: ffffffc0dbe10000
PC is at dev_pm_opp_set_regulator+0x64/0x100
LR is at dev_pm_opp_set_regulator+0x38/0x100
pc : [<ffffff800846e968>] lr : [<ffffff800846e93c>] pstate: 80000045
sp : ffffffc0dbe138d0
x29: ffffffc0dbe138d0 x28: ffffff8008bb708e
x27: ffffff8008f58308 x26: ffffff8008d78000
x25: 0000000000000005 x24: ffffff8008bb89e9
x23: ffffff8008bb89e9 x22: ffffffc0eff814d8
x21: ffffffc0e47d2000 x20: ffffff8008dd6000
x19: ffffff8008dd6540 x18: 0000000030d00800
x17: 0000000000000000 x16: 0000000000000000
x15: 0000000000000000 x14: 0000000000000000
x13: ffffffffff000000 x12: 0000000000000008
x11: 0000000000000038 x10: 0101010101010101
x9 : fffffffffffffffc x8 : 7f7f7f7f7f7f7f7f
x7 : ff786b6f6f74722c x6 : 0000000000000080
x5 : ffffffc0eff814d8 x4 : ffffffc0e47d2128
x3 : ffffff8008dd6530 x2 : ffffffc0e47e6200
x1 : ffffffc0e47d2138 x0 : ffffffc0e47e3f00

SP: 0xffffffc0dbe13850:
3850  08dd6000 ffffff80 e47d2000 ffffffc0 eff814d8 ffffffc0 08bb89e9 ffffff80
3870  08bb89e9 ffffff80 00000005 00000000 08d78000 ffffff80 08f58308 ffffff80
3890  08bb708e ffffff80 dbe138d0 ffffffc0 0846e93c ffffff80 dbe138d0 ffffffc0
38b0  0846e968 ffffff80 80000045 00000000 08dd6540 ffffff80 eff814d8 ffffffc0
38d0  dbe13910 ffffffc0 086572f4 ffffff80 00000000 00000000 eff814d8 ffffffc0
38f0  da7bc400 ffffffc0 d9c3f100 ffffffc0 00000000 00000000 08d78000 ffffff80
3910  dbe13960 ffffffc0 08650678 ffffff80 da7bc400 ffffffc0 08f58438 ffffff80
3930  08f58000 ffffff80 00000001 00000000 08d4f000 ffffff80 00000005 00000000

X0: 0xffffffc0e47e3e80:
3e80  75676572 6f74616c 2d352e72 50505553 a300594c 8a2e0000 f3ff0000 fff30000
3ea0  ffff0000 4fff0000 d5770000 65320000 b4ff0000 d24c0000 ffff0000 bf170000
3ec0  bfff0000 7e770000 df2c0000 00890000 5fee0000 85af0000 ffff0000 fdde0000
3ee0  feff0000 bfbf0000 bfa70000 36920000 4e3f0000 9cee0000 ffff0000 ff2f0000
3f00  eff6e4d8 ffffffc0 e4770028 ffffffc0 e4770028 ffffffc0 00000001 00000000
3f20  000dbba0 000dbba0 e47e3f80 ffffffc0 00000000 00000000 00000000 00000000
3f40  00000000 00000000 00000000 00000000 e4770000 ffffffc0 e6fcb900 ffffffc0
3f60  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

X1: 0xffffffc0e47d20b8:
20b8  00000000 00000000 00000000 00000000 080ae3ac ffffff80 e47d2090 ffffffc0
20d8  00200005 ffffffff ffffffff 00000000 00000000 00000000 00000000 00000000
20f8  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
2118  00000000 00000000 00000000 00000000 d9c41900 ffffffc0 e47e6200 ffffffc0
2138  e47d2138 ffffffc0 e47d2138 ffffffc0 eff98388 ffffffc0 00009c40 00000000
2158  00000000 00000001 00000000 00000000 00000000 00000000 00000000 00000000
2178  00000000 00000000 e47e3d00 ffffffc0 e47e3f00 ffffffc0 e6fcb540 ffffffc0
2198  35757063 00000000 00000000 00000000 00000000 00000000 00000000 00000000

X2: 0xffffffc0e47e6180:
6180  e47e6280 ffffffc0 00000200 dead0000 00000001 00000000 30a32c00 00000000
61a0  000dbba0 00000000 000dbba0 00000000 000dbba0 00000000 00000000 00000000
61c0  00000000 00000000 e47d2000 ffffffc0 00000000 00000000 00000050 00000000
61e0  eff98ac0 ffffffc0 e6fd6cc0 ffffffc0 00000000 00000000 00000000 00000000
6200  e47d2128 ffffffc0 d9c41900 ffffffc0 eff814d8 ffffffc0 00000000 00000000
6220  00000000 00000000 e6fcb540 ffffffc0 00000000 00000000 00000000 00000000
6240  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
6260  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

X4: 0xffffffc0e47d20a8:
20a8  080e5090 ffffff80 00000000 00000000 00000000 00000000 00000000 00000000
20c8  080ae3ac ffffff80 e47d2090 ffffffc0 00200005 ffffffff ffffffff 00000000
20e8  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
2108  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
2128  d9c41900 ffffffc0 e47e6200 ffffffc0 e47d2138 ffffffc0 e47d2138 ffffffc0
2148  eff98388 ffffffc0 00009c40 00000000 00000000 00000001 00000000 00000000
2168  00000000 00000000 00000000 00000000 00000000 00000000 e47e3d00 ffffffc0
2188  e47e3f00 ffffffc0 e6fcb540 ffffffc0 35757063 00000000 00000000 00000000

X5: 0xffffffc0eff81458:
1458  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1478  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1498  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
14b8  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000001
14d8  00000000 00000000 e6862f00 ffffffc0 e6865e00 ffffffc0 e6900020 ffffffc0
14f8  eff6e4f0 ffffffc0 e7209c10 ffffffc0 e71b6a00 ffffffc0 08dd5130 ffffff80
1518  e686a2d0 ffffffc0 00000003 00000007 00000000 00000000 00000000 00000000
1538  00000001 00000000 eff81540 ffffffc0 eff81540 ffffffc0 00000000 00000000

X13: 0xfffffffffeffff80:
ff80  ******** ******** ******** ******** ******** ******** ******** ********
ffa0  ******** ******** ******** ******** ******** ******** ******** ********
ffc0  ******** ******** ******** ******** ******** ******** ******** ********
ffe0  ******** ******** ******** ******** ******** ******** ******** ********
0000  ******** ******** ******** ******** ******** ******** ******** ********
0020  ******** ******** ******** ******** ******** ******** ******** ********
0040  ******** ******** ******** ******** ******** ******** ******** ********
0060  ******** ******** ******** ******** ******** ******** ******** ********

X21: 0xffffffc0e47d1f80:
1f80  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1fa0  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1fc0  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1fe0  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
2000  e47d1800 ffffffc0 e479b000 ffffffc0 00000001 00000000 e47d2018 ffffffc0
2020  e47d2018 ffffffc0 00000000 00000000 00000000 00000000 00000005 00000000
2040  08d58a20 ffffff80 000f000f 00000000 00000000 00000000 e47d2050 ffffffc0
2060  00000000 00000000 e47d2060 ffffffc0 00000000 00000000 e47d2070 ffffffc0

X22: 0xffffffc0eff81458:
1458  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1478  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
1498  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
14b8  00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000001
14d8  00000000 00000000 e6862f00 ffffffc0 e6865e00 ffffffc0 e6900020 ffffffc0
14f8  eff6e4f0 ffffffc0 e7209c10 ffffffc0 e71b6a00 ffffffc0 08dd5130 ffffff80
1518  e686a2d0 ffffffc0 00000003 00000007 00000000 00000000 00000000 00000000
1538  00000001 00000000 eff81540 ffffffc0 eff81540 ffffffc0 00000000 00000000

X29: 0xffffffc0dbe13850:
3850  08dd6000 ffffff80 e47d2000 ffffffc0 eff814d8 ffffffc0 08bb89e9 ffffff80
3870  08bb89e9 ffffff80 00000005 00000000 08d78000 ffffff80 08f58308 ffffff80
3890  08bb708e ffffff80 dbe138d0 ffffffc0 0846e93c ffffff80 dbe138d0 ffffffc0
38b0  0846e968 ffffff80 80000045 00000000 08dd6540 ffffff80 eff814d8 ffffffc0
38d0  dbe13910 ffffffc0 086572f4 ffffff80 00000000 00000000 eff814d8 ffffffc0
38f0  da7bc400 ffffffc0 d9c3f100 ffffffc0 00000000 00000000 08d78000 ffffff80
3910  dbe13960 ffffffc0 08650678 ffffff80 da7bc400 ffffffc0 08f58438 ffffff80
3930  08f58000 ffffff80 00000001 00000000 08d4f000 ffffff80 00000005 00000000

---[ end trace e939d14abbcc0fd3 ]---
Call trace:
Exception stack(0xffffffc0dbe13710 to 0xffffffc0dbe13830)
3700:                                   ffffff8008dd6540 ffffff8008dd6000
3720: ffffffc0dbe138d0 ffffff800846e968 ffffffc0dbe13770 ffffff80086b096c
3740: 0000000000000004 ffffffbffe800924 ffffffc0dbe13780 ffffff80086b0930
3760: ffffff8008f58d50 ffffffc0eff96758 ffffffc0dbe13780 ffffff80086b0940
3780: ffffffc0dbe13790 ffffff80086b13b4 ffffffc0dbe137d0 ffffff80086b1620
37a0: 0000000000000000 ffffffbffe800870 ffffffc0e47e3f00 ffffffc0e47d2138
37c0: ffffffc0e47e6200 ffffff8008dd6530 ffffffc0e47d2128 ffffffc0eff814d8
37e0: 0000000000000080 ff786b6f6f74722c 7f7f7f7f7f7f7f7f fffffffffffffffc
3800: 0101010101010101 0000000000000038 0000000000000008 ffffffffff000000
3820: 0000000000000000 0000000000000000
[<ffffff800846e968>] dev_pm_opp_set_regulator+0x64/0x100
[<ffffff80086572f4>] cpufreq_init+0xb8/0x290
[<ffffff8008650678>] cpufreq_online+0x268/0x680
[<ffffff8008650ae0>] cpufreq_cpu_callback+0x50/0x5c
[<ffffff80080b5168>] notifier_call_chain+0x48/0x80
[<ffffff80080b5498>] __raw_notifier_call_chain+0xc/0x14
[<ffffff800809a480>] __cpu_notify+0x30/0x50
[<ffffff800809a4b4>] cpu_notify+0x14/0x1c
[<ffffff800809ab9c>] _cpu_up+0x10c/0x1e0
[<ffffff800809b2c4>] enable_nonboot_cpus+0x114/0x230
[<ffffff80080d7e10>] suspend_enter+0x464/0x61c
[<ffffff80080d8088>] suspend_devices_and_enter+0xc0/0x2b8
[<ffffff80080d8814>] pm_suspend+0x594/0x600
[<ffffff80080d6c10>] state_store+0x50/0x88
[<ffffff8008305434>] kobj_attr_store+0x18/0x28
[<ffffff80081e98bc>] sysfs_kf_write+0x44/0x4c
[<ffffff80081e8c78>] kernfs_fop_write+0x10c/0x168
[<ffffff800818b3e4>] __vfs_write+0x28/0xd0
[<ffffff800818b640>] vfs_write+0xac/0x174
[<ffffff800818b7d4>] SyS_write+0x48/0x84
[<ffffff8008084530>] el0_svc_naked+0x24/0x28
cpu cpu5: Failed to set regulator for cpu5: -16
CPU5 is up

It seems recent LSK and upstream is buggy about OPP and cpufreq,
we will waiting for new patch to fix this bug.

Change-Id: I73237b567451d9f3a0ac23f76e529b319f8480f3
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
8 years agoARM64: config: rockchip_defconfig remove Rogue of G6110 GPU.
ZhuangXiaoLiang [Tue, 24 May 2016 08:42:29 +0000 (16:42 +0800)]
ARM64: config: rockchip_defconfig remove Rogue of G6110 GPU.

Change-Id: Ib10daa86eb9e3aa2e33c2b5b4b9fdb3f66709b6a
Signed-off-by: ZhuangXiaoLiang <zhuangxl@rock-chips.com>
8 years agoARM64: dts: rk3399-evb: enable saradc node
Jianqun Xu [Tue, 24 May 2016 08:06:43 +0000 (16:06 +0800)]
ARM64: dts: rk3399-evb: enable saradc node

Set status of saradc node to "okay", to support saradc.

Change-Id: Ic36e390097efbf564b5cbdc321086b6965cd54b0
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
8 years agoARM64: dts: rockchip: remove clk_ignore_unused bootarg for rk3366-tb
David Wu [Mon, 23 May 2016 14:05:26 +0000 (22:05 +0800)]
ARM64: dts: rockchip: remove clk_ignore_unused bootarg for rk3366-tb

Change-Id: I9d3bbdb20cae6b572294ba5a7cf09dbc23278ccf
Signed-off-by: David Wu <david.wu@rock-chips.com>
8 years agoARM64: dts: rk3399-android: mipi dsi host1 add grf
Xubilv [Mon, 23 May 2016 08:53:01 +0000 (16:53 +0800)]
ARM64: dts: rk3399-android: mipi dsi host1 add grf

Change-Id: Ifa69588690c33da4d58c393f33f344101a4ea11d
Signed-off-by: Xubilv <xbl@rock-chips.com>
8 years agousb: gadget: accessory: add compat_ioctl
Wu Liang feng [Mon, 23 May 2016 06:51:10 +0000 (14:51 +0800)]
usb: gadget: accessory: add compat_ioctl

Add compat_ioctl for accessory to work on 64-bit platforms.

Change-Id: I805395c35017111bf0c462847f11765c7088d266
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
8 years agousb: gadget: mtp: add new ioctl for compat
Rohith Seelaboyina [Wed, 5 Mar 2014 10:40:00 +0000 (16:10 +0530)]
usb: gadget: mtp: add new ioctl for compat

Define a new ioctl for MTP_SEND_EVENT, as its
ioctl numbers depends on the size of struct
mtp_event, which varies in ARCH32 and ARCH64.

Change-Id: I060604057ac6c55991118b3f61b187468b4ee0fd
Signed-off-by: Rohith Seelaboyina <rseelaboyina@nvidia.com>
Reviewed-on: http://git-master/r/377800
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
8 years agousb: gadget: mtp: add compat_ioctl
Wu Liang feng [Mon, 23 May 2016 03:07:18 +0000 (11:07 +0800)]
usb: gadget: mtp: add compat_ioctl

Add compat_ioctl for mtp to work on 64-bit platforms.

Change-Id: Icef0f42a554d770a83152c4185aca9e39e041165
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
8 years agoARM64: dts: rk3399: add node support for reboot-mode
Jianqun Xu [Wed, 18 May 2016 07:30:57 +0000 (15:30 +0800)]
ARM64: dts: rk3399: add node support for reboot-mode

Rockchip RK3399 SoCs support reboot with modes, such as recovery mode,
loader mode and normal mode.

Change-Id: I96ed872f849c2b3b06d236248995db18be070960
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>