UPSTREAM: clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036
authorHeiko Stuebner <heiko@sntech.de>
Mon, 14 Mar 2016 08:01:59 +0000 (16:01 +0800)
committerCaesar Wang <wxt@rock-chips.com>
Tue, 31 May 2016 01:52:01 +0000 (09:52 +0800)
commit1ba1a1f573d321913629ee65cdcde7b18e92febc
tree26793f10fd1e55d48068fabfb712be8eeff32025
parent766af089e7094efcfe9820681e2d3e5a4e9d0132
UPSTREAM: clk: rockchip: associate SCLK_MAC_PLL and disable reparenting on rk3036

The emac needs constant and very specific rate but the possible PLL-sources
are very limited, so we expect the PLL source to be set manually on per
board and don't want it to get changed in an automatic way later.
So add the necessary clock-id and disable reparenting on set_rate calls.

Change-Id: I999ba51df51fef50075eb119e3b976b990fe714c
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: linux-clk@vger.kernel.org
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 2c6fae2501d87ca94b5249df38797f02d4e39add)
drivers/clk/rockchip/clk-rk3036.c