ARM64: dts: rk3399: pd: Add vopl\vopb\mipi\hdmi pd nodes
authorElaine Zhang <zhangqing@rock-chips.com>
Fri, 27 May 2016 08:30:54 +0000 (16:30 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Mon, 30 May 2016 09:28:18 +0000 (17:28 +0800)
Change-Id: Iff66cf997896d34111706f884a32e82f44e21d6f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3399-android.dtsi

index eb6c36df940a6da5ea5f30db1cb7b25a864f18b3..4ca527e29b0565552a5d8482e067c1b1829fd66c 100644 (file)
                rockchip,grf = <&grf>;
                rockchip,pwr18 = <0>;
                rockchip,iommu-enabled = <1>;
+               power-domains = <&power RK3399_PD_VOPB>;
                power_ctr: power_ctr {
                /*rockchip,debug = <0>;
                lcd_en: lcd-en {
                rockchip,grf = <&grf>;
                rockchip,pwr18 = <0>;
                rockchip,iommu-enabled = <1>;
+               power-domains = <&power RK3399_PD_VOPL>;
        };
 
        vopl_mmu_rk_fb: vopl-mmu {
                pinctrl-0 = <&hdmi_i2c_xfer &hdmi_cec>;
                pinctrl-1 = <&i2c3_gpio>;
                rockchip,grf = <&grf>;
+               power-domains = <&power RK3399_PD_HDCP>;
        };
 
        mipi0_rk_fb: mipi-rk-fb@ff960000 {
                interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>, <&cru SCLK_MIPIDPHY_CFG>;
                clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg";
+               power-domains = <&power RK3399_PD_VIO>;
        };
 
        mipi1_rk_fb: mipi-rk-fb@ff968000 {
                interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI1>, <&cru SCLK_MIPIDPHY_CFG>;
                clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "mipi_dphy_cfg";
+               power-domains = <&power RK3399_PD_VIO>;
        };
 
        hdmi-sound {