mmc: core: Fix HS switch failure in mmc_select_hs400

mmc: core: Fix HS switch failure in mmc_select_hs400

We should change HS400 mode selection timing to meet JEDEC
specification. The JEDEC 5.1 said that change the frequency to <= 52MHZ
after HS_TIMING switch. Refer to section 6.6.2.3 "HS400" timing mode
selection:

Set the "Timing Interface" parameter in the HS_TIMING[185] field of the
Extended CSD register to 0x1 to switch to High Speed mode and then set
the clock frequency to a value not greater than 52MHZ.

Change-Id: Ia676b8e3ea4a66867372c9719d768a6d4405ff15
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>