UPSTREAM: ARM: dts: rockchip: add soc-specific compatibles for rk3036 SoCs
authorCaesar Wang <wxt@rock-chips.com>
Thu, 14 Jan 2016 01:08:41 +0000 (09:08 +0800)
committerCaesar Wang <wxt@rock-chips.com>
Tue, 31 May 2016 08:43:24 +0000 (16:43 +0800)
While drivers will bind to the generic compatible values, this enables
the use of more specialized drivers in the future, if the need arises.

Change-Id: Ifb5028f71140d6742de4c5af668c85b6835c3eb2
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org next/linux-next.git master
 commit 0082180c8dd22c3b813618882ec9629d94172214)

arch/arm/boot/dts/rk3036.dtsi

index ee457a2e997e5e3f7f948950e598a6afd2ffc0c9..78974492cb1190b49b3f42b8678dee10e3df8d27 100644 (file)
        };
 
        usb_otg: usb@10180000 {
-               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+               compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
                                "snps,dwc2";
                reg = <0x10180000 0x40000>;
                interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        usb_host: usb@101c0000 {
-               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+               compatible = "rockchip,rk3036-usb", "rockchip,rk3066-usb",
                                "snps,dwc2";
                reg = <0x101c0000 0x40000>;
                interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        emmc: dwmmc@1021c000 {
-               compatible = "rockchip,rk3288-dw-mshc";
+               compatible = "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x1021c000 0x4000>;
                interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                broken-cd;
        };
 
        i2c1: i2c@20056000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x20056000 0x1000>;
                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
        };
 
        i2c2: i2c@2005a000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x2005a000 0x1000>;
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
        };
 
        i2c0: i2c@20072000 {
-               compatible = "rockchip,rk3288-i2c";
+               compatible = "rockchip,rk3036-i2c", "rockchip,rk3288-i2c";
                reg = <0x20072000 0x1000>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;