Move TargetRegistry and TargetSelect from Target to Support where they belong.
[oota-llvm.git] / lib / Target /
2011-08-24 Evan ChengMove TargetRegistry and TargetSelect from Target to...
2011-08-24 Jim GrosbachThumb add SP assembly syntax fix.
2011-08-24 Jim GrosbachThumb1 ADD/SUB SP instructions are predicable in Thumb2...
2011-08-24 Owen AndersonBe stricter in enforcing IT instruction predicate value...
2011-08-24 Richard OsborneAdd Uses=[SP] to call instructions. This fixes a miscom...
2011-08-24 Craig TopperBreak 256-bit vector int add/sub/mul into two 128-bit...
2011-08-23 Bruno Cardoso LopesFix a nasty bug where a v4i64 was being wrong emitted...
2011-08-23 Jim GrosbachMove ARM frame-unwinding EHABI handling a touch earlier.
2011-08-23 Jim Grosbach[SU]XT[BH] are only available on ARMv6 and up.
2011-08-23 Evan ChengSome refactoring so TargetRegistry.h no longer has...
2011-08-23 Jim GrosbachThumb parsing and encoding for SVC.
2011-08-23 Nick LewyckyPerformSubCombine to work on integers larger than i128...
2011-08-23 Jim GrosbachThumb parsing and encoding for tSTRspi.
2011-08-23 Jim GrosbachThumb parsing and encoding for STM.
2011-08-23 Jim GrosbachFactor low reg checking into a helper function.
2011-08-23 Owen AndersonFix decoding of Thumb2 prefetch instructions, which...
2011-08-23 Owen AndersonFix Thumb2 decoding of CPS instructions to mirror ARM...
2011-08-23 Jim GrosbachClean up Thumb load/store multiple definitions.
2011-08-23 Owen AndersonFix two more instances of mis-matched operand names...
2011-08-23 Craig TopperAdd support for breaking 256-bit v16i16 and v32i8 VSETC...
2011-08-23 Bruno Cardoso LopesIntroduce a pass to insert vzeroupper instructions...
2011-08-22 Jim GrosbachThumb parsing and encoding for SBC.
2011-08-22 Jim GrosbachThumb parsing and encoding for RSB.
2011-08-22 Owen AndersonReject invalid imod values in t2CPS instructions.
2011-08-22 Owen Andersont2SMLAD is a four-register instruction, not a three...
2011-08-22 Owen AndersonCorrect operand naming of t2USAT16 to allow proper...
2011-08-22 Jim GrosbachRevert r138278 now that r138289 has fixed the root...
2011-08-22 Owen AndersonMatch operand naming to allow correct decoding of t2LDR...
2011-08-22 Jim GrosbachImprove error checking for tPUSH and tPOP register...
2011-08-22 Owen AndersonMatch operand names to provide correct decoding for...
2011-08-22 Owen AndersonProvide a correct decoder hook for Thumb2 shifted regis...
2011-08-22 Jim GrosbachThumb assemmbly parsing diagnostic improvements for...
2011-08-22 Benjamin KramerX86: Add some operand types required to identify calls.
2011-08-22 Jim GrosbachTemporarilly mark tMUL as not commutable.
2011-08-22 Owen AndersonProvide operand encoding information for half-precision...
2011-08-22 Bruno Cardoso LopesAdd support for breaking 256-bit int VETCC into two...
2011-08-22 Bruno Cardoso LopesAdd 128-bit AVX codegen for PCMP* family of integer...
2011-08-22 Owen AndersonFix decoding of VMOVSRR and VMOVRRS, which account...
2011-08-22 Jim GrosbachTighten up ARM reglist validation a bit.
2011-08-22 Owen AndersonFix another batch of VLD/VST decoding crashes discovere...
2011-08-22 Owen AndersonCorrect writeback handling of duplicating VLD instructi...
2011-08-22 Jim GrosbachClean up predicates on ARM target instruction aliases.
2011-08-22 Owen AndersonFix an incorrect shift when decoding SP-relative stores...
2011-08-20 Benjamin KramerCast through intptr_t, ISO C++ requires it.
2011-08-20 Chad RosierRemove the VMOVQQ pseudo instruction.
2011-08-20 Chad RosierRemove VMOVQQQQ pseudo instruction.
2011-08-20 Jakob Stoklund OlesenAdd <imp-def> operands to QQ and QQQQ stack loads.
2011-08-20 Chad RosierVMOVQQQQs pseudo instructions are only created by ARMBa...
2011-08-19 Jim GrosbachThumb parsing and encoding support for NOP.
2011-08-19 Akira HatanakaFix bug in function IsShiftedMask. Remove parameter...
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for NEG.
2011-08-19 Jim GrosbachFix NEG alias
2011-08-19 Jim GrosbachBe more lenient on tied operand matching for MUL.
2011-08-19 Bruno Cardoso LopesRe-write part of VEX encoding logic, to be more easy...
2011-08-19 Jim GrosbachUpdate tests.
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for MUL.
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for MOV.
2011-08-19 Jim GrosbachTidy up. Tab character.
2011-08-19 Jim GrosbachTab characters.
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for LSL(immediate).
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for LDRSB and LDRSH.
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for LDRH.
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for LDRB.
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for LDR(literal).
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for LDR(immediate...
2011-08-19 Jim GrosbachUse helper function to check for low registers.
2011-08-19 Jim GrosbachThumb assembly parsing and encoding for LDR(immediate...
2011-08-19 Jim GrosbachAdd explanatory comment.
2011-08-19 Kalle RaiskilaHave SPU backend use the external TCE scheduler, if...
2011-08-19 Craig TopperAdd TB encoding to VEX versions of SSE fp logical opera...
2011-08-19 Bruno Cardoso LopesFix PR10677. Initial patch and idea by Peter Cooper...
2011-08-19 Benjamin KramerMake a bunch of symbols private.
2011-08-18 Bruno Cardoso LopesRe-encoded 128-bit AVX versions of SQRT, RSQRT, RCP...
2011-08-18 Akira HatanakaUse subword loads instead of a 4-byte load when the...
2011-08-18 Owen AndersonSTC2L_POST and STC2L_POST should be handled the same...
2011-08-18 Owen AndersonFix the decoding of RFE instruction. RFEs have the...
2011-08-18 Owen AndersonRemember to fill in some operands so we can print _some...
2011-08-18 Owen AndersonImprove handling of failure and unpredictable cases...
2011-08-18 Jim GrosbachThumb assembly parsing and encoding for LDM instruction.
2011-08-18 Akira HatanakaMake IsShiftedMask a static function rather than defini...
2011-08-18 Jim GrosbachThumb assembly parsing and encoding for CMP.
2011-08-18 Jim GrosbachThumb instructions CBZ and CBNZ are Thumb2, not THumb1.
2011-08-18 Jim GrosbachARM Thumb blx instruction fixup has same data range...
2011-08-18 Jim Grosbach80 columns.
2011-08-18 Bruno Cardoso LopesClenup and fix encoding for Mips ins and ext instruction
2011-08-18 Jim GrosbachAdd missing 'break'.
2011-08-18 Richard OsborneAdd intrinsics for SETEV, GETED, GETET.
2011-08-18 Bruno Cardoso LopesCleanup vector logical ops in AVX and add use int versi...
2011-08-17 Jim GrosbachRemove extraneous newline from operand print method...
2011-08-17 Jim GrosbachClean up patterns for Thumb1 system instructions.
2011-08-17 Akira HatanakaChanged definition of EXT and INS per Bruno's comments.
2011-08-17 Jim GrosbachThumb assembly parsing and encoding for B.
2011-08-17 Jim GrosbachThumb assembly parsing and encoding for ASR.
2011-08-17 Bruno Cardoso LopesFix PR10688. Add support for spliting 256-bit vector...
2011-08-17 Jim GrosbachTidy up. 80 columns.
2011-08-17 Jim GrosbachARM clean up the imm_sr operand class representation.
2011-08-17 Jim GrosbachFix predicate for imm1_32
2011-08-17 Jim GrosbachThumb assembly parsing and encoding for ADR.
2011-08-17 Jim Grosbach80 columns.
2011-08-17 Jim GrosbachTidy up.
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