Thumb parsing and encoding for tSTRspi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138348 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index 563b0ef3b63098412eed2d45d9a3bc160eff23c3..c54aae0c04f8a96a7fea522b954010d43747ff62 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -194,6 +194,8 @@ def t_addrmode_is1 : Operand<i32>,
 
 // t_addrmode_sp := sp + imm8 * 4
 //
+// FIXME: This really shouldn't have an explicit SP operand at all. It should
+// be implicit, just like in the instruction encoding itself.
 def t_addrmode_sp_asm_operand : AsmOperandClass { let Name = "MemThumbSPI"; }
 def t_addrmode_sp : Operand<i32>,
                     ComplexPattern<i32, 2, "SelectThumbAddrModeSP", []> {

diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index a8d13cf1a57e585f2ae132a57c468dbeaebd7784..b2e73452d290fd74760e2393ac2bd7f0b0c7da3d 100644 (file)
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -444,11 +444,19 @@ _func:
         str r2, [r7, #0]
         str r5, [r1, #4]
         str r3, [r7, #124]
+        str r2, [sp]
+        str r3, [sp, #0]
+        str r4, [sp, #20]
+        str r5, [sp, #1020]
 
 @ CHECK: str   r2, [r7]                @ encoding: [0x3a,0x60]
 @ CHECK: str   r2, [r7]                @ encoding: [0x3a,0x60]
 @ CHECK: str   r5, [r1, #4]            @ encoding: [0x4d,0x60]
 @ CHECK: str   r3, [r7, #124]          @ encoding: [0xfb,0x67]
+@ CHECK: str   r2, [sp]                @ encoding: [0x00,0x92]
+@ CHECK: str   r3, [sp]                @ encoding: [0x00,0x93]
+@ CHECK: str   r4, [sp, #20]           @ encoding: [0x05,0x94]
+@ CHECK: str   r5, [sp, #1020]         @ encoding: [0xff,0x95]
 
 
 @------------------------------------------------------------------------------