oota-llvm.git
3 years agoTaints the non-acquire RMW's store address with the load part relaxed-loads-taint-store
Peizhao Ou [Tue, 17 Jul 2018 22:24:31 +0000 (15:24 -0700)]
Taints the non-acquire RMW's store address with the load part

3 years agoTaints upcoming store and adds bogus conditional branches else where. Now as a separa...
Peizhao Ou [Wed, 4 Apr 2018 23:23:31 +0000 (16:23 -0700)]
Taints upcoming store and adds bogus conditional branches else where. Now as a separate branch

3 years agoAdd bogus conditional branch before stlx
Peizhao Ou [Tue, 13 Mar 2018 22:52:43 +0000 (15:52 -0700)]
Add bogus conditional branch before stlx

3 years agoDon't taint relaxed loads that immediately comes before an AcqRel read-modify-write op
Peizhao Ou [Tue, 13 Mar 2018 02:07:17 +0000 (19:07 -0700)]
Don't taint relaxed loads that immediately comes before an AcqRel read-modify-write op

3 years agoAdds one fake conditional branch for a sequence of loads
Peizhao Ou [Wed, 7 Mar 2018 23:39:50 +0000 (15:39 -0800)]
Adds one fake conditional branch for a sequence of loads

3 years agoEnsures further conditional branch tainting instructions are added in the proper...
Peizhao Ou [Wed, 7 Mar 2018 21:31:50 +0000 (13:31 -0800)]
Ensures further conditional branch tainting instructions are added in the proper place

3 years agoAdds cast to 64-bit integers and set fake conditional branch insert point to proper...
Peizhao Ou [Wed, 7 Mar 2018 20:21:46 +0000 (12:21 -0800)]
Adds cast to 64-bit integers and set fake conditional branch insert point to proper phi position

3 years agoAdds bogus conditional branch after all relaxed loads
Peizhao Ou [Wed, 7 Mar 2018 08:21:40 +0000 (00:21 -0800)]
Adds bogus conditional branch after all relaxed loads

3 years agoSets insertion point of fake cond branch to the last phi node in the block
Peizhao Ou [Tue, 5 Dec 2017 01:09:40 +0000 (17:09 -0800)]
Sets insertion point of fake cond branch to the last phi node in the block

3 years agoFixes undominating relaxed loads issue
Peizhao Ou [Tue, 5 Dec 2017 00:19:06 +0000 (16:19 -0800)]
Fixes undominating relaxed loads issue

3 years agoFixes a bug in finding the upcoming store/conditional branch instruction
Peizhao Ou [Wed, 29 Nov 2017 18:14:44 +0000 (10:14 -0800)]
Fixes a bug in finding the upcoming store/conditional branch instruction

3 years agoGenerates conditional branch instead of fake ones for Select instruction in some...
Peizhao Ou [Wed, 29 Nov 2017 00:37:38 +0000 (16:37 -0800)]
Generates conditional branch instead of fake ones for Select instruction in some cases

3 years agoReverts wrong modification to MachineBlockPlacement & BranchFolding; uses a new strat...
Peizhao Ou [Mon, 20 Nov 2017 22:55:11 +0000 (14:55 -0800)]
Reverts wrong modification to MachineBlockPlacement & BranchFolding; uses a new strategy to mark intentionally added fake conditional branch

3 years agoFixes the issue of removing manually added fake conditional branches
Peizhao Ou [Fri, 17 Nov 2017 01:47:14 +0000 (17:47 -0800)]
Fixes the issue of removing manually added fake conditional branches

3 years agoAdds fake conditional branches right after relaxed loads if necessary
Peizhao Ou [Fri, 17 Nov 2017 00:04:38 +0000 (16:04 -0800)]
Adds fake conditional branches right after relaxed loads if necessary

3 years agoFixes untainted branch that is immediately after relaxed loads
Peizhao Ou [Thu, 16 Nov 2017 00:00:46 +0000 (16:00 -0800)]
Fixes untainted branch that is immediately after relaxed loads

3 years agoTaints relaxed loads to enforce load/store ordering
Peizhao Ou [Wed, 15 Nov 2017 08:29:12 +0000 (00:29 -0800)]
Taints relaxed loads to enforce load/store ordering

3 years agoModifies AtomicExpandPass to transform relaxed loads/RMW/AtomicXchg to acquire
Peizhao Ou [Wed, 8 Nov 2017 22:49:40 +0000 (14:49 -0800)]
Modifies AtomicExpandPass to transform relaxed loads/RMW/AtomicXchg to acquire

5 years agoBump version to 3.8.1 master
Tom Stellard [Mon, 28 Mar 2016 18:13:48 +0000 (18:13 +0000)]
Bump version to 3.8.1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@264605 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: tidy up
Hans Wennborg [Wed, 2 Mar 2016 23:38:03 +0000 (23:38 +0000)]
ReleaseNotes: tidy up

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@262542 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRemove 'if you are using a released version' warning
Hans Wennborg [Wed, 2 Mar 2016 23:10:55 +0000 (23:10 +0000)]
Remove 'if you are using a released version' warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@262537 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: C API policy; by Eric Christopher
Hans Wennborg [Wed, 2 Mar 2016 18:19:22 +0000 (18:19 +0000)]
ReleaseNotes: C API policy; by Eric Christopher

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@262496 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: PowerPC; by Kit Barton
Hans Wennborg [Fri, 26 Feb 2016 21:37:52 +0000 (21:37 +0000)]
ReleaseNotes: PowerPC; by Kit Barton

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@262074 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AArch64] Fix bug in prolog clobbering live reg when shrink wrapping.
Quentin Colombet [Mon, 22 Feb 2016 22:27:47 +0000 (22:27 +0000)]
[AArch64] Fix bug in prolog clobbering live reg when shrink wrapping.

This adapts r261349 to the release branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261586 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261441, r261447, and r261546:
Hans Wennborg [Mon, 22 Feb 2016 21:05:14 +0000 (21:05 +0000)]
Merging r261441, r261447, and r261546:

------------------------------------------------------------------------
r261441 | nemanjai | 2016-02-20 10:16:25 -0800 (Sat, 20 Feb 2016) | 12 lines

Fix for PR 26500

This patch corresponds to review:
http://reviews.llvm.org/D17294

It ensures that whatever block we are emitting the prologue/epilogue into, we
have the necessary scratch registers. It takes away the hard-coded register
numbers for use as scratch registers as registers that are guaranteed to be
available in the function prologue/epilogue are not guaranteed to be available
within the function body. Since we shrink-wrap, the prologue/epilogue may end
up in the function body.
------------------------------------------------------------------------

------------------------------------------------------------------------
r261447 | nemanjai | 2016-02-20 12:45:37 -0800 (Sat, 20 Feb 2016) | 6 lines

Fix the build bot break caused by rL261441.

The patch has a necessary call to a function inside an assert. Which is fine
when you have asserts turned on. Not so much when they're off. Sorry about
the regression.
------------------------------------------------------------------------

------------------------------------------------------------------------
r261546 | nemanjai | 2016-02-22 10:04:00 -0800 (Mon, 22 Feb 2016) | 6 lines

Fix for PR26690 take 2

This is what was meant to be in the initial commit to fix this bug. The
parens were missing. This commit also adds a test case for the bug and
has undergone full testing on PPC and X86.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261572 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261387:
Hans Wennborg [Mon, 22 Feb 2016 17:51:28 +0000 (17:51 +0000)]
Merging r261387:
------------------------------------------------------------------------
r261387 | davide | 2016-02-19 16:44:47 -0800 (Fri, 19 Feb 2016) | 8 lines

[X86ISelLowering] Fix TLSADDR lowering when shrink-wrapping is enabled.

TLSADDR nodes are lowered into actuall calls inside MC. In order to prevent
shrink-wrapping from pushing prologue/epilogue past them (which result
in TLS variables being accessed before the stack frame is set up), we
put markers, so that the stack gets adjusted properly.
Thanks to Quentin Colombet for guidance/help on how to fix this problem!

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261542 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261384:
Hans Wennborg [Mon, 22 Feb 2016 17:47:10 +0000 (17:47 +0000)]
Merging r261384:
------------------------------------------------------------------------
r261384 | qcolombet | 2016-02-19 16:32:29 -0800 (Fri, 19 Feb 2016) | 4 lines

[RegAllocFast] Properly track the physical register definitions on calls.

PR26485

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261539 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261368:
Hans Wennborg [Fri, 19 Feb 2016 21:42:57 +0000 (21:42 +0000)]
Merging r261368:
------------------------------------------------------------------------
r261368 | hans | 2016-02-19 13:40:12 -0800 (Fri, 19 Feb 2016) | 3 lines

Revert r255691 "[LoopVectorizer] Refine loop vectorizer's register usage calculator by ignoring specific instructions."

It caused PR26509.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261369 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261360:
Hans Wennborg [Fri, 19 Feb 2016 21:35:00 +0000 (21:35 +0000)]
Merging r261360:
------------------------------------------------------------------------
r261360 | dim | 2016-02-19 12:14:11 -0800 (Fri, 19 Feb 2016) | 19 lines

Fix incorrect selection of AVX512 sqrt when OptForSize is on

Summary:
When optimizing for size, sqrt calls can be incorrectly selected as
AVX512 VSQRT instructions.  This is because X86InstrAVX512.td has a
`Requires<[OptForSize]>` in its `avx512_sqrt_scalar` multiclass
definition.  Even if the target does not support AVX512, the class can
apparently still be chosen, leading to an incorrect selection of
`vsqrtss`.

In PR26625, this lead to an assertion: Reg >= X86::FP0 && Reg <=
X86::FP6 && "Expected FP register!", because the `vsqrtss` instruction
requires an XMM register, which is not available on i686 CPUs.

Reviewers: grosbach, resistor, joker.eph

Subscribers: spatel, emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D17414
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261367 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261365:
Hans Wennborg [Fri, 19 Feb 2016 21:28:08 +0000 (21:28 +0000)]
Merging r261365:
------------------------------------------------------------------------
r261365 | hans | 2016-02-19 13:26:31 -0800 (Fri, 19 Feb 2016) | 3 lines

Revert r253557 "Alternative to long nops for X86 CPUs, by Andrey Turetsky"

Turns out the new nop sequences aren't actually nops on x86_64 (PR26554).
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261366 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerge r261331: avoid out of bounds loads for interleaved access vectorization
Renato Golin [Fri, 19 Feb 2016 17:35:27 +0000 (17:35 +0000)]
Merge r261331: avoid out of bounds loads for interleaved access vectorization

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261341 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261306:
Hans Wennborg [Fri, 19 Feb 2016 17:13:16 +0000 (17:13 +0000)]
Merging r261306:
------------------------------------------------------------------------
r261306 | matze | 2016-02-18 20:44:19 -0800 (Thu, 18 Feb 2016) | 1 line

LegalizeDAG: Fix ExpandFCOPYSIGN assuming the same type on both inputs
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261334 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261258:
Hans Wennborg [Fri, 19 Feb 2016 00:08:56 +0000 (00:08 +0000)]
Merging r261258:
------------------------------------------------------------------------
r261258 | rnk | 2016-02-18 12:57:41 -0800 (Thu, 18 Feb 2016) | 14 lines

[IR] Straighten out bundle overload of IRBuilder::CreateCall

IRBuilder has two ways of putting bundle operands on calls: the default
operand bundle, and an overload of CreateCall that takes an operand
bundle list.

Previously, this overload used a default argument of None. This made it
impossible to distinguish between the case were the caller doesn't care
about bundles, and the case where the caller explicitly wants no
bundles. We behaved as if they wanted the latter behavior rather than
the former, which led to problems with simplifylibcalls and WinEH.

This change fixes it by making the parameter non-optional, so we can
distinguish these two cases.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261282 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261039:
Hans Wennborg [Wed, 17 Feb 2016 19:00:40 +0000 (19:00 +0000)]
Merging r261039:
------------------------------------------------------------------------
r261039 | rnk | 2016-02-16 16:17:33 -0800 (Tue, 16 Feb 2016) | 6 lines

[X86] Fix a shrink-wrapping miscompile around __chkstk

__chkstk clobbers EAX. If EAX is live across the prologue, then we have
to take extra steps to save it. We already had code to do this if EAX
was a register parameter. This change adapts it to work when shrink
wrapping is used.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261136 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r258616:
David Majnemer [Wed, 17 Feb 2016 18:49:28 +0000 (18:49 +0000)]
Merging r258616:
------------------------------------------------------------------------
r258616 | majnemer | 2016-01-22 22:00:44 -0800 (Fri, 22 Jan 2016) | 3 lines

[PruneEH] Don't try to insert a terminator after another terminator

LLVM's BasicBlock has a single terminator, it is not valid to have two.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261132 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r258611:
David Majnemer [Wed, 17 Feb 2016 18:49:09 +0000 (18:49 +0000)]
Merging r258611:
------------------------------------------------------------------------
r258611 | majnemer | 2016-01-22 21:41:29 -0800 (Fri, 22 Jan 2016) | 6 lines

[PruneEH] FuncletPads must not have undef operands

Instead of RAUW with undef, replace the first non-token instruction with
unreachable.

This fixes PR26263.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261131 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r258610:
David Majnemer [Wed, 17 Feb 2016 18:48:45 +0000 (18:48 +0000)]
Merging r258610:
------------------------------------------------------------------------
r258610 | majnemer | 2016-01-22 21:41:27 -0800 (Fri, 22 Jan 2016) | 3 lines

[PruneEH] Unify invoke and call handling in DeleteBasicBlock

No functionality change is intended.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261130 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r258609:
David Majnemer [Wed, 17 Feb 2016 18:48:28 +0000 (18:48 +0000)]
Merging r258609:
------------------------------------------------------------------------
r258609 | majnemer | 2016-01-22 21:41:22 -0800 (Fri, 22 Jan 2016) | 5 lines

[PruneEH] Reuse code from removeUnwindEdge

PruneEH had functionality idential to removeUnwindEdge.
Consolidate around removeUnwindEdge.
No functionality change is intended.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261129 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259702:
David Majnemer [Wed, 17 Feb 2016 18:42:17 +0000 (18:42 +0000)]
Merging r259702:
------------------------------------------------------------------------
r259702 | majnemer | 2016-02-03 13:30:34 -0800 (Wed, 03 Feb 2016) | 7 lines

[LoopStrengthReduce] Don't rewrite PHIs with incoming values from CatchSwitches

Bail out if we have a PHI on an EHPad that gets a value from a
CatchSwitchInst.  Because the CatchSwitchInst cannot be split, there is
no good place to stick any instructions.

This fixes PR26373.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261126 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r260164:
David Majnemer [Wed, 17 Feb 2016 18:41:44 +0000 (18:41 +0000)]
Merging r260164:
------------------------------------------------------------------------
r260164 | akaylor | 2016-02-08 14:52:51 -0800 (Mon, 08 Feb 2016) | 5 lines

[regalloc][WinEH] Do not mark intervals as not spillable if they contain a regmask

Differential Revision: http://reviews.llvm.org/D16831

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261125 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r260733:
David Majnemer [Wed, 17 Feb 2016 18:41:08 +0000 (18:41 +0000)]
Merging r260733:
------------------------------------------------------------------------
r260733 | akaylor | 2016-02-12 13:10:16 -0800 (Fri, 12 Feb 2016) | 5 lines

[WinEH] Prevent EH state numbering from skipping nested cleanup pads that never return

Differential Revision: http://reviews.llvm.org/D17208

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261124 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: new Win EH instructions; by David Majnemer
Hans Wennborg [Wed, 17 Feb 2016 17:57:26 +0000 (17:57 +0000)]
ReleaseNotes: new Win EH instructions; by David Majnemer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261116 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r261033:
Hans Wennborg [Wed, 17 Feb 2016 16:40:51 +0000 (16:40 +0000)]
Merging r261033:
------------------------------------------------------------------------
r261033 | akaylor | 2016-02-16 15:52:18 -0800 (Tue, 16 Feb 2016) | 5 lines

Fix build LLVM with -D LLVM_USE_INTEL_JITEVENTS:BOOL=ON on Windows

Differential Revision: http://reviews.llvm.org/D16940

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261106 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: -femultated-tls; by Chih-hung Hsieh
Hans Wennborg [Wed, 17 Feb 2016 00:05:18 +0000 (00:05 +0000)]
ReleaseNotes: -femultated-tls; by Chih-hung Hsieh

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261035 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r260390:
Hans Wennborg [Tue, 16 Feb 2016 23:22:17 +0000 (23:22 +0000)]
Merging r260390:
------------------------------------------------------------------------
r260390 | jyknight | 2016-02-10 09:47:20 -0800 (Wed, 10 Feb 2016) | 12 lines

[SPARC] Repair floating-point condition encodings in assembly parser.

The encodings for floating point conditions A(lways) and N(ever) were
incorrectly specified for the assembly parser, per Sparc manual v8 page
121. This change corrects that mistake.

Also, strangely, all of the branch instructions already had MC test
cases, except for the broken ones. Added the tests.

Patch by Chris Dewhurst

Differential Revision: http://reviews.llvm.org/D17074
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261031 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r258103:
Hans Wennborg [Tue, 16 Feb 2016 21:46:52 +0000 (21:46 +0000)]
Merging r258103:
------------------------------------------------------------------------
r258103 | kli | 2016-01-18 16:04:41 -0800 (Mon, 18 Jan 2016) | 2 lines

parseArch() supports more variations of arch names for PowerPC builds

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261015 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: shrink-wrapping; by Quentin Colombet
Hans Wennborg [Tue, 16 Feb 2016 19:37:14 +0000 (19:37 +0000)]
ReleaseNotes: shrink-wrapping; by Quentin Colombet

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261001 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: typo
Hans Wennborg [Tue, 16 Feb 2016 19:29:54 +0000 (19:29 +0000)]
ReleaseNotes: typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@261000 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: Hexagon; by Krzysztof Parzyszek
Hans Wennborg [Tue, 16 Feb 2016 19:27:50 +0000 (19:27 +0000)]
ReleaseNotes: Hexagon; by Krzysztof Parzyszek

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260999 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r257864 and r258112:
Hans Wennborg [Tue, 16 Feb 2016 19:20:40 +0000 (19:20 +0000)]
Merging r257864 and r258112:

------------------------------------------------------------------------
r257864 | axw | 2016-01-14 19:33:35 -0800 (Thu, 14 Jan 2016) | 12 lines

[docs] Document LLVM_{BUILD,LINK}_LLVM_DYLIB

Summary:
Document the LLVM_BUILD_LLVM_DYLIB and LLVM_LINK_LLVM_DYLIB
CMake options, move BUILD_SHARED_LIBS out of frequently-used,
and add a note/warning to BUILD_SHARED_LIBS.

Reviewers: beanz, delcypher, mjacob

Subscribers: mjacob, llvm-commits

Differential Revision: http://reviews.llvm.org/D16208
------------------------------------------------------------------------

------------------------------------------------------------------------
r258112 | axw | 2016-01-18 21:43:21 -0800 (Mon, 18 Jan 2016) | 8 lines

docs: address post-commit review

Rewording/expansion of CMake options
suggested by Dan Liew.

See http://reviews.llvm.org/D16208.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260996 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: -DLLVM_LINK_LLVM_DYLIB=ON; by Andrew Wilkins
Hans Wennborg [Tue, 16 Feb 2016 19:19:03 +0000 (19:19 +0000)]
ReleaseNotes: -DLLVM_LINK_LLVM_DYLIB=ON; by Andrew Wilkins

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260995 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: ORC in Kaleidoscope and C bindings; by Lang Hames
Hans Wennborg [Tue, 16 Feb 2016 19:07:38 +0000 (19:07 +0000)]
ReleaseNotes: ORC in Kaleidoscope and C bindings; by Lang Hames

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260991 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: fix typo, reported by Eugene
Hans Wennborg [Tue, 16 Feb 2016 17:38:25 +0000 (17:38 +0000)]
ReleaseNotes: fix typo, reported by Eugene

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260985 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r260703:
Hans Wennborg [Fri, 12 Feb 2016 19:03:12 +0000 (19:03 +0000)]
Merging r260703:
------------------------------------------------------------------------
r260703 | hans | 2016-02-12 11:02:39 -0800 (Fri, 12 Feb 2016) | 11 lines

[CMake] don't build libLTO when LLVM_ENABLE_PIC is OFF

When cmake is run with -DLLVM_ENABLE_PIC=OFF, build fails while
linking shared library libLTO.so, because its dependencies are built
with -fno-PIC. More details here: https://llvm.org/bugs/show_bug.cgi?id=26484.
This diff reverts r252652 (git 9fd4377ddb83aee3c049dc8757e7771edbb8ee71),
which removed check NOT LLVM_ENABLE_PIC before disabling build for libLTO.so.

Patch by Igor Sugak!

Differential Revision: http://reviews.llvm.org/D17049
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260704 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoARM: Mention r251322 in release notes.
Peter Collingbourne [Fri, 12 Feb 2016 18:46:48 +0000 (18:46 +0000)]
ARM: Mention r251322 in release notes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260702 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r260641:
Hans Wennborg [Fri, 12 Feb 2016 17:52:29 +0000 (17:52 +0000)]
Merging r260641:
------------------------------------------------------------------------
r260641 | axw | 2016-02-11 17:42:43 -0800 (Thu, 11 Feb 2016) | 10 lines

Avoid linking LLVM component libraries with libLLVM

Patch by Jack Howarth.

When linking to libLLVM, don't also link to the component
libraries that constitute libLLVM.

Differential Revision: http://reviews.llvm.org/D16945

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260693 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r260427:
Hans Wennborg [Fri, 12 Feb 2016 16:18:07 +0000 (16:18 +0000)]
Merging r260427:
------------------------------------------------------------------------
r260427 | nha | 2016-02-10 12:13:58 -0800 (Wed, 10 Feb 2016) | 16 lines

AMDGPU: Release the scavenged offset register during VGPR spill

Summary:
This fixes a crash where subsequent spills would be unable to scavenge
a register. In particular, it fixes a crash in piglit's
spec@glsl-1.50@execution@geometry@max-input-components (the test still
has a shader that fails to compile because of too many SGPR spills, but
at least it doesn't crash any more).

This is a candidate for the release branch.

Reviewers: arsenm, tstellarAMD

Subscribers: qcolombet, arsenm

Differential Revision: http://reviews.llvm.org/D16558
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260687 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[ARM/AArch64] 3.8.0 release notes changes
Renato Golin [Fri, 12 Feb 2016 15:29:34 +0000 (15:29 +0000)]
[ARM/AArch64] 3.8.0 release notes changes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260684 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[AVR] Add release notes for 3.8
Dylan McKay [Fri, 12 Feb 2016 06:38:02 +0000 (06:38 +0000)]
[AVR] Add release notes for 3.8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260659 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: oh, there already was a section about X86
Hans Wennborg [Fri, 12 Feb 2016 02:32:24 +0000 (02:32 +0000)]
ReleaseNotes: oh, there already was a section about X86

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260650 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: start off a 'Changes to X86' section
Hans Wennborg [Fri, 12 Feb 2016 02:29:33 +0000 (02:29 +0000)]
ReleaseNotes: start off a 'Changes to X86' section

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260648 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoRelease Notes: RegisterScheduler::setDefault removed; by Mehdi Amini
Hans Wennborg [Fri, 12 Feb 2016 01:56:35 +0000 (01:56 +0000)]
Release Notes: RegisterScheduler::setDefault removed; by Mehdi Amini

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260643 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r260587:
Hans Wennborg [Fri, 12 Feb 2016 01:42:38 +0000 (01:42 +0000)]
Merging r260587:
------------------------------------------------------------------------
r260587 | pete | 2016-02-11 13:10:40 -0800 (Thu, 11 Feb 2016) | 13 lines

Set load alignment on aggregate loads.

When optimizing a extractvalue(load), we generate a load from the
aggregate type.  This load didn't have alignment set and so would
get the alignment of the type.  This breaks when the type is packed
and so the alignment should be lower.

For example, loading { int, int } would give us alignment of 4, but
the original load from this type may have an alignment of 1 if packed.

Reviewed by David Majnemer

Differential revision: http://reviews.llvm.org/D17158
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260640 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: drop in-progress warning and svn checkout note
Hans Wennborg [Fri, 12 Feb 2016 00:45:55 +0000 (00:45 +0000)]
ReleaseNotes: drop in-progress warning and svn checkout note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260634 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoAdd LDC compiler to list of external OS projects using LLVM 3.8
Kai Nacke [Thu, 11 Feb 2016 20:42:16 +0000 (20:42 +0000)]
Add LDC compiler to list of external OS projects using LLVM 3.8

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260584 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoReleaseNotes: Document changes to ilist API
Duncan P. N. Exon Smith [Wed, 10 Feb 2016 19:20:23 +0000 (19:20 +0000)]
ReleaseNotes: Document changes to ilist API

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260415 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259958:
Hans Wennborg [Mon, 8 Feb 2016 22:15:55 +0000 (22:15 +0000)]
Merging r259958:
------------------------------------------------------------------------
r259958 | evandro | 2016-02-05 16:01:41 -0800 (Fri, 05 Feb 2016) | 11 lines

[AArch64] Add the scheduling model for Exynos-M1

Summary:
Add the core scheduling model for the Samsung Exynos-M1 (ARMv8-A).

Reviewers: jmolloy, rengolin, christof, MinSeongKIM, t.p.northover

Subscribers: aemerson, rengolin, MatzeB

Differential Revision: http://reviews.llvm.org/D16644
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260156 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259696:
Hans Wennborg [Mon, 8 Feb 2016 18:31:49 +0000 (18:31 +0000)]
Merging r259696:
------------------------------------------------------------------------
r259696 | kfischer | 2016-02-03 13:13:33 -0800 (Wed, 03 Feb 2016) | 12 lines

[DWARFDebug] Fix another case of overlapping ranges

Summary:
In r257979, I added code to ensure that we wouldn't merge DebugLocEntries if
the pieces they describe overlap. Unfortunately, I failed to cover the case,
where there may have multiple active Expressions in the entry, in which case we
need to make sure that no two values overlap before we can perform the merge.

This fixed PR26148.

Reviewers: aprantl
Differential Revision: http://reviews.llvm.org/D16742
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260121 91177308-0d34-0410-b5e6-96231b3b80d8

5 years ago[mips] Add initial release notes for MIPS32.
Daniel Sanders [Mon, 8 Feb 2016 14:14:18 +0000 (14:14 +0000)]
[mips] Add initial release notes for MIPS32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@260095 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259381:
Hans Wennborg [Fri, 5 Feb 2016 22:17:38 +0000 (22:17 +0000)]
Merging r259381:
------------------------------------------------------------------------
r259381 | uweigand | 2016-02-01 10:31:19 -0800 (Mon, 01 Feb 2016) | 21 lines

[SystemZ] Fix wrong-code generation for certain always-false conditions

We've found another bug in the code generation logic conditions for a
certain class of always-false conditions, those of the form
   if ((a & 1) < 0)

These only reach the back end when compiling without optimization.

The bug was introduced by the choice of using TEST UNDER MASK
to implement a check for
   if ((a & MASK) < VAL)
as
   if ((a & MASK) == 0)

where VAL is less than the the lowest bit of MASK.  This is correct
in all cases except for VAL == 0, in which case the original
condition is always false, but the replacement isn't.

Fixed by excluding that particular case.

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259940 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259886 and r259888:
Hans Wennborg [Fri, 5 Feb 2016 16:30:31 +0000 (16:30 +0000)]
Merging r259886 and r259888:

------------------------------------------------------------------------
r259886 | nemanjai | 2016-02-05 06:50:29 -0800 (Fri, 05 Feb 2016) | 5 lines

Fix for PR 26193

This is a simple fix for a PowerPC intrinsic that was incorrectly defined
(the return type was incorrect).
------------------------------------------------------------------------

------------------------------------------------------------------------
r259888 | nemanjai | 2016-02-05 07:03:17 -0800 (Fri, 05 Feb 2016) | 3 lines

Add the missing test case for PR26193
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259891 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259840 on top of r259178:
Hans Wennborg [Fri, 5 Feb 2016 00:55:39 +0000 (00:55 +0000)]
Merging r259840 on top of r259178:

------------------------------------------------------------------------
r259178 | echristo | 2016-01-28 23:20:30 -0800 (Thu, 28 Jan 2016) | 1 line

Refactor common code for PPC fast isel load immediate selection.
------------------------------------------------------------------------

------------------------------------------------------------------------
r259840 | nemanjai | 2016-02-04 15:14:42 -0800 (Thu, 04 Feb 2016) | 7 lines

Fix for PR 26356

Using the load immediate only when the immediate (whether signed or unsigned)
can fit in a 16-bit signed field. Namely, from -32768 to 32767 for signed and
0 to 65535 for unsigned. This patch also ensures that we sign-extend under the
right conditions.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259858 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259798, r259835:
Hans Wennborg [Fri, 5 Feb 2016 00:46:12 +0000 (00:46 +0000)]
Merging r259798, r259835:

------------------------------------------------------------------------
r259798 | nemanjai | 2016-02-04 08:18:08 -0800 (Thu, 04 Feb 2016) | 9 lines

Enable the %s modifier in inline asm template string

This patch corresponds to review:
http://reviews.llvm.org/D16847

There are some files in glibc that use the output operand modifier even though
it was deprecated in GCC. This patch just adds support for it to prevent issues
with such files.
------------------------------------------------------------------------

------------------------------------------------------------------------
r259835 | nemanjai | 2016-02-04 14:36:10 -0800 (Thu, 04 Feb 2016) | 3 lines

Provide a test case for rl259798
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259856 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259695:
Hans Wennborg [Thu, 4 Feb 2016 16:59:45 +0000 (16:59 +0000)]
Merging r259695:
------------------------------------------------------------------------
r259695 | tfiala | 2016-02-03 13:13:23 -0800 (Wed, 03 Feb 2016) | 11 lines

Address NDEBUG-related linkage issues for Value::assertModuleIsMaterialized()

The IR/Value class had a linkage issue present when LLVM was built
as a library, and the LLVM library build time had different settings
for NDEBUG than the client of the LLVM library.  Clients could get
into a state where the LLVM lib expected
Value::assertModuleIsMaterialized() to be inline-defined in the header
but clients expected that method to be defined in the LLVM library.

See this llvm-commits thread for more details:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160201/329667.html
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259801 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259740:
Hans Wennborg [Thu, 4 Feb 2016 02:16:36 +0000 (02:16 +0000)]
Merging r259740:
------------------------------------------------------------------------
r259740 | nemanjai | 2016-02-03 17:58:20 -0800 (Wed, 03 Feb 2016) | 2 lines

Test case for PR 26381

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259743 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259177:
Hans Wennborg [Wed, 3 Feb 2016 22:00:13 +0000 (22:00 +0000)]
Merging r259177:
------------------------------------------------------------------------
r259177 | echristo | 2016-01-28 23:20:01 -0800 (Thu, 28 Jan 2016) | 5 lines

Since LI/LIS sign extend the constant passed into the instruction we should
check that the sign extended constant fits into 16-bits if we want a
zero extended value, otherwise go ahead and put it together piecemeal.

Fixes PR26356.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259713 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259649:
Hans Wennborg [Wed, 3 Feb 2016 21:24:31 +0000 (21:24 +0000)]
Merging r259649:
------------------------------------------------------------------------
r259649 | jamesm | 2016-02-03 07:05:06 -0800 (Wed, 03 Feb 2016) | 11 lines

[DemandedBits] Revert r249687 due to PR26071

This regresses a test in LoopVectorize, so I'll need to go away and think about how to solve this in a way that isn't broken.

From the writeup in PR26071:

What's happening is that ComputeKnownZeroes is telling us that all bits except the LSB are zero. We're then deciding that only the LSB needs to be demanded from the icmp's inputs.

This is where we're wrong - we're assuming that after simplification the bits that were known zero will continue to be known zero. But they're not - during trivialization the upper bits get changed (because an XOR isn't shrunk), so the icmp fails.

The fault is in demandedbits - its contract does clearly state that a non-demanded bit may either be zero or one.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259699 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259645:
Hans Wennborg [Wed, 3 Feb 2016 21:18:35 +0000 (21:18 +0000)]
Merging r259645:
------------------------------------------------------------------------
r259645 | nemanjai | 2016-02-03 04:53:38 -0800 (Wed, 03 Feb 2016) | 4 lines

Fix for PR 26381

Simple fix - Constant values were not being sign extended in FastIsel.

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259698 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259346 (with adjustments for r258867):
Hans Wennborg [Tue, 2 Feb 2016 17:41:39 +0000 (17:41 +0000)]
Merging r259346 (with adjustments for r258867):

------------------------------------------------------------------------
r259346 | ibreger | 2016-02-01 01:57:15 -0800 (Mon, 01 Feb 2016) | 3 lines

AVX512: fix mask handling for gather/scatter/prefetch intrinsics.

Differential Revision: http://reviews.llvm.org/D16755
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259536 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259342 (with s/p2align 4/align 16) because r258750 is not in 3.8.
Hans Wennborg [Tue, 2 Feb 2016 17:35:07 +0000 (17:35 +0000)]
Merging r259342 (with s/p2align 4/align 16) because r258750 is not in 3.8.

------------------------------------------------------------------------
r259342 | ibreger | 2016-01-31 23:56:09 -0800 (Sun, 31 Jan 2016) | 3 lines

AVX512 : Fix SETCCE lowering for KNL 32 bit.

Differential Revision: http://reviews.llvm.org/D16752
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259533 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259375:
Hans Wennborg [Mon, 1 Feb 2016 19:18:10 +0000 (19:18 +0000)]
Merging r259375:
------------------------------------------------------------------------
r259375 | majnemer | 2016-02-01 09:37:56 -0800 (Mon, 01 Feb 2016) | 6 lines

[InstCombine] Don't transform (X+INT_MAX)>=(Y+INT_MAX) -> (X<=Y)

This miscompile came about because we tried to use a transform which was
only appropriate for xor operators when addition was present.

This fixes PR26407.
------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259390 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r259228:
Tim Northover [Fri, 29 Jan 2016 22:00:06 +0000 (22:00 +0000)]
Merging r259228:
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r259228 | tnorthover | 2016-01-29 11:18:46 -0800 (Fri, 29 Jan 2016) | 13 lines

ARM: don't mangle DAG constant if it has more than one use

The basic optimisation was to convert (mul $LHS, $complex_constant) into
roughly "(shl (mul $LHS, $simple_constant), $simple_amt)" when it was expected
to be cheaper. The original logic checks that the mul only has one use (since
we're mangling $complex_constant), but when used in even more complex
addressing modes there may be an outer addition that can pick up the wrong
value too.

I *think* the ARM addressing-mode problem is actually unreachable at the
moment, but that depends on complex assessments of the profitability of
pre-increment addressing modes so I've put a real check in there instead of an
assertion.
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5 years agoMerging r259236:
Hans Wennborg [Fri, 29 Jan 2016 21:33:02 +0000 (21:33 +0000)]
Merging r259236:
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r259236 | spatel | 2016-01-29 12:21:02 -0800 (Fri, 29 Jan 2016) | 8 lines

[InstCombine] avoid an insertelement transformation that induces the opposite extractelement fold (PR26354)

We would infinite loop because we created a shufflevector that was wider than
needed and then failed to combine that with the insertelement. When subsequently
visiting the extractelement from that shuffle, we see that it's unnecessary,
delete it, and trigger another visit to the insertelement.

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5 years agoMerging r258922:
Tom Stellard [Fri, 29 Jan 2016 16:45:55 +0000 (16:45 +0000)]
Merging r258922:

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r258922 | marek.olsak | 2016-01-27 06:19:45 -0500 (Wed, 27 Jan 2016) |
12 lines

AMDGPU/SI: Stoney has only 16 LDS banks

Summary:
This is a candidate for stable, along with all patches that add the
"stoney"
processor.

Reviewers: tstellarAMD

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D16485

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5 years agoMerging r257666:
Tom Stellard [Fri, 29 Jan 2016 16:45:52 +0000 (16:45 +0000)]
Merging r257666:

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r257666 | changpeng.fang | 2016-01-13 15:39:25 -0500 (Wed, 13 Jan 2016) | 2 lines

AMDGPU/SI: Update ISA version for FIJI

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5 years agoBring back the test-suite export in test-release without bringing back the build...
Daniel Sanders [Thu, 28 Jan 2016 21:05:40 +0000 (21:05 +0000)]
Bring back the test-suite export in test-release without bringing back the build failures.

Summary:
r257791 disabled the test-suite export since the addition of CMakeLists.txt was
causing build failures. This patch exports the test-suite again but does so
outside the source tree so that it isn't included in the Phase[123] builds.

Reviewers: hans

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D16679

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259093 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r258971:
Hans Wennborg [Thu, 28 Jan 2016 18:23:25 +0000 (18:23 +0000)]
Merging r258971:
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r258971 | spatel | 2016-01-27 11:22:45 -0800 (Wed, 27 Jan 2016) | 26 lines

[SimplifyCFG] limit recursion depth when speculating instructions (PR26308)

This is a fix for:
https://llvm.org/bugs/show_bug.cgi?id=26308

With the switch to using the TTI cost model in:
http://reviews.llvm.org/rL228826
...it became possible to hit a zero-cost cycle of instructions (gep -> phi -> gep...),
so we need a cap for the recursion in DominatesMergePoint().

A recursion depth parameter was already added for a different reason in:
http://reviews.llvm.org/rL255660
...so we can just set a limit for it.

I pulled "10" out of the air and made it an independent parameter that we can play with.
It might be higher than it needs to be given the currently low default value of
PHINodeFoldingThreshold (2). That's the starting cost value that we enter the recursion
with, and most instructions have cost set to TCC_Basic (1), so I don't think we're going
to speculate more than 2 instructions with the current parameters.

As noted in the review and the TODO comment, we can do better than just limiting recursion
depth.

Differential Revision: http://reviews.llvm.org/D16637

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5 years agoMerging r258471:
Hans Wennborg [Thu, 28 Jan 2016 18:16:55 +0000 (18:16 +0000)]
Merging r258471:
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r258471 | pirama | 2016-01-21 17:16:57 -0800 (Thu, 21 Jan 2016) | 14 lines

Do not lower VSETCC if operand is an f16 vector

Summary:
SETCC with f16 vectors has OperationAction set to Expand but still gets
lowered to FCM* intrinsics based on its result type.  This patch skips
lowering of VSETCC if the operand is an f16 vector.

v4 and v8 tests included.

Reviewers: ab, jmolloy

Subscribers: srhines, llvm-commits

Differential Revision: http://reviews.llvm.org/D15361
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5 years agoMerging r258891:
Hans Wennborg [Wed, 27 Jan 2016 00:19:52 +0000 (00:19 +0000)]
Merging r258891:
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r258891 | hans | 2016-01-26 16:19:05 -0800 (Tue, 26 Jan 2016) | 25 lines

test-release.sh: Ignore LC_CTYPE in sed invocation on Darwin

Here, sed is used to prepare object files for comparison via cmp. On my Darwin
15.4.0 machine, LC_CTYPE is set to UTF-8 (by default, I believe). Under these
circumstances, anything sed is made to read will be treated as UTF-8, prompting
it to signal an error if it is not, like so:

% sed s/a/b/ <(head -n1 /dev/random) >/dev/null; echo $?
sed: RE error: illegal byte sequence
1
%

To make sed work as expected, I need to set LC_CTYPE to C:

% env LC_CTYPE=C sed s/a/b/ <(head -n1 /dev/random) >/dev/null; echo $?
0
%

Without this change, sed will exit with an error for every single file that it
compares between phase 2 and phase 3, thereby making it look as if the
differences were far larger than they are.

Patch by Elias Pipping!

Differential Revision: http://reviews.llvm.org/D16548
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5 years agoMerging r258386:
Tom Stellard [Tue, 26 Jan 2016 23:57:01 +0000 (23:57 +0000)]
Merging r258386:

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r258386 | thomas.stellard | 2016-01-20 23:28:34 -0500 (Wed, 20 Jan 2016) | 14 lines

AMDGPU/SI: Pass whether to use the SI scheduler via Target Attribute

Summary:
Currently the SI scheduler can be selected via command line option,
but it turned out it would be better if it was selectable via a Target Attribute.

This patch adds "si-scheduler" attribute to the backend.

Reviewers: tstellarAMD, echristo

Subscribers: echristo, arsenm

Differential Revision: http://reviews.llvm.org/D16192

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5 years agoMerging r258184:
Sanjoy Das [Tue, 26 Jan 2016 22:29:46 +0000 (22:29 +0000)]
Merging r258184:
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r258184 | sanjoy | 2016-01-19 12:53:51 -0800 (Tue, 19 Jan 2016) | 20 lines

[SCEV] Fix PR26207

In some cases, the max backedge taken count can be more conservative
than the exact backedge taken count (for instance, because
ScalarEvolution::getRange is not control-flow sensitive whereas
computeExitLimitFromICmp can be).  In these cases,
computeExitLimitFromCond (specifically the bit that deals with `and` and
`or` instructions) can create an ExitLimit instance with a
`SCEVCouldNotCompute` max backedge count expression, but a computable
exact backedge count expression.  This violates an implicit SCEV
assumption: a computable exact BE count should imply a computable max BE
count.

This change

 - Makes the above implicit invariant explicit by adding an assert to
   ExitLimit's constructor

 - Changes `computeExitLimitFromCond` to be more robust around
   conservative max backedge counts
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5 years agoRevert accidental changes from r258805
Hans Wennborg [Tue, 26 Jan 2016 19:44:49 +0000 (19:44 +0000)]
Revert accidental changes from r258805

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@258844 91177308-0d34-0410-b5e6-96231b3b80d8

5 years agoMerging r258436:
Dimitry Andric [Tue, 26 Jan 2016 19:43:59 +0000 (19:43 +0000)]
Merging r258436:
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r258436 | dim | 2016-01-21 22:57:49 +0100 (Thu, 21 Jan 2016) | 17 lines

Let test-release.sh checkout subprojects directly into the target tree,
instead of using symlinks

Summary:
In the past I have run into several problems with the way
`test-release.sh` creates all the subproject directories as siblings,
and then uses symlinks to stitch them all together.  In some scenarios
this leads to clang not being able to find header files, etc.

This patch changes the script so it directly exports into the correct
target locations for each subproject.

Reviewers: hans

Subscribers: emaste, llvm-commits

Differential Revision: http://reviews.llvm.org/D16420
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5 years agoMerging r258729:
Hans Wennborg [Tue, 26 Jan 2016 19:31:16 +0000 (19:31 +0000)]
Merging r258729:
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r258729 | matze | 2016-01-25 14:08:25 -0800 (Mon, 25 Jan 2016) | 13 lines

X86ISelLowering: Fix cmov(cmov) special lowering bug

There's a special case in EmitLoweredSelect() that produces an improved
lowering for cmov(cmov) patterns. However this special lowering is
currently broken if the inner cmov has multiple users so this patch
stops using it in this case.

If you wonder why this wasn't fixed by continuing to use the special
lowering and inserting a 2nd PHI for the inner cmov: I believe this
would incur additional copies/register pressure so the special lowering
does not improve upon the normal one anymore in this case.

This fixes http://llvm.org/PR26256 (= rdar://24329747)
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5 years agoMerging r258690:
James Molloy [Tue, 26 Jan 2016 13:30:49 +0000 (13:30 +0000)]
Merging r258690:
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r258690 | jamesm | 2016-01-25 14:49:36 +0000 (Mon, 25 Jan 2016) | 7 lines

[DemandedBits] Fix computation of demanded bits for ICmps

The computation of ICmp demanded bits is independent of the individual operand being evaluated. We simply return a mask consisting of the minimum leading zeroes of both operands.

We were incorrectly passing "I" to ComputeKnownBits - this should be "UserI->getOperand(0)". In cases where we were evaluating the 1th operand, we were taking the minimum leading zeroes of it and itself.

This should fix PR26266.
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5 years agoMerging r258406:
Hans Wennborg [Mon, 25 Jan 2016 22:24:50 +0000 (22:24 +0000)]
Merging r258406:
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r258406 | vedantk | 2016-01-21 09:04:42 -0800 (Thu, 21 Jan 2016) | 16 lines

[GCOV] Avoid emitting profile arcs for module and skeleton CUs

Do not emit profile arc files and note files for module and skeleton
CU's.

Our users report seeing unexpected *.gcda and *.gcno files in their
projects when using gcov-style profiling with modules or frameworks.
The unwanted files come from these modules. This is not very helpful
for end-users. Further, we've seen reports of instrumented programs
crashing while writing these files out (due to I/O failures).

rdar://problem/22838296

Reviewed-by: aprantl
Differential Revision: http://reviews.llvm.org/D15997
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5 years agoMerging r258416 and r258428:
Hans Wennborg [Fri, 22 Jan 2016 18:37:31 +0000 (18:37 +0000)]
Merging r258416 and r258428:

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r258416 | spatel | 2016-01-21 10:01:57 -0800 (Thu, 21 Jan 2016) | 2 lines

make helper functions static; NFCI
------------------------------------------------------------------------

------------------------------------------------------------------------
r258428 | spatel | 2016-01-21 12:19:54 -0800 (Thu, 21 Jan 2016) | 15 lines

[LibCallSimplifier] don't get fooled by a fake fmin()

This is similar to the bug/fix:
https://llvm.org/bugs/show_bug.cgi?id=26211
http://reviews.llvm.org/rL258325

The fmin() test case reveals another bug caused by sloppy
code duplication. It will crash without this patch because
fp128 is a valid floating-point type, but we would think
that we had matched a function that used doubles.

The new helper function can be used to replace similar
checks that are used in several other places in this file.
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5 years agoMerging r257886:
Hans Wennborg [Fri, 22 Jan 2016 18:26:38 +0000 (18:26 +0000)]
Merging r257886:
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r257886 | jamesm | 2016-01-15 02:36:01 -0800 (Fri, 15 Jan 2016) | 3 lines

[CodeGenPrepare] Try and appease sanitizers

dupRetToEnableTailCallOpts(BB) can invalidate BB. It must run *after* we iterate across BB!
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5 years agoMerging r258325:
Hans Wennborg [Wed, 20 Jan 2016 21:49:02 +0000 (21:49 +0000)]
Merging r258325:
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r258325 | spatel | 2016-01-20 09:41:14 -0800 (Wed, 20 Jan 2016) | 21 lines

[LibCallSimplifier] don't get fooled by a fake sqrt()

The test case will crash without this patch because the subsequent call to
hasUnsafeAlgebra() assumes that the call instruction is an FPMathOperator
(ie, returns an FP type).

This part of the function signature check was omitted for the sqrt() case,
but seems to be in place for all other transforms.

Before:
http://reviews.llvm.org/rL257400
...we would have needlessly continued execution in optimizeSqrt(), but the
bug was harmless because we'd eventually fail some other check and return
without damage.

This should fix:
https://llvm.org/bugs/show_bug.cgi?id=26211

Differential Revision: http://reviews.llvm.org/D16198

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5 years agoMerging r257940:
Hans Wennborg [Wed, 20 Jan 2016 21:30:57 +0000 (21:30 +0000)]
Merging r257940:
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r257940 | djg | 2016-01-15 13:56:40 -0800 (Fri, 15 Jan 2016) | 10 lines

[SelectionDAG] CSE nodes with differing SDNodeFlags

In the optimizer (GVN etc.) when eliminating redundant nodes with different
flags, the flags are ignored for the purposes of testing for congruence, and
then intersected for the purposes of producing a result that supports the union
of all the uses. This commit makes SelectionDAG's CSE do the same thing,
allowing it to CSE nodes in more cases. This fixes PR26063.

Differential Revision: http://reviews.llvm.org/D15957

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Merging r257942:
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r257942 | djg | 2016-01-15 14:07:35 -0800 (Fri, 15 Jan 2016) | 2 lines

Remove a now-empty file left behind by r257940.

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