Merging r259649:
authorHans Wennborg <hans@hanshq.net>
Wed, 3 Feb 2016 21:24:31 +0000 (21:24 +0000)
committerHans Wennborg <hans@hanshq.net>
Wed, 3 Feb 2016 21:24:31 +0000 (21:24 +0000)
commit6b78a48f5c068df653f1c12d2ad7832aaa45c7a1
treee6858454e2c6929f7442a49f16aa411e99b3f067
parent18a86c95fc36b5f622e8dc87f71252de37a1ed44
Merging r259649:
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r259649 | jamesm | 2016-02-03 07:05:06 -0800 (Wed, 03 Feb 2016) | 11 lines

[DemandedBits] Revert r249687 due to PR26071

This regresses a test in LoopVectorize, so I'll need to go away and think about how to solve this in a way that isn't broken.

From the writeup in PR26071:

What's happening is that ComputeKnownZeroes is telling us that all bits except the LSB are zero. We're then deciding that only the LSB needs to be demanded from the icmp's inputs.

This is where we're wrong - we're assuming that after simplification the bits that were known zero will continue to be known zero. But they're not - during trivialization the upper bits get changed (because an XOR isn't shrunk), so the icmp fails.

The fault is in demandedbits - its contract does clearly state that a non-demanded bit may either be zero or one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259699 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Analysis/DemandedBits.cpp
test/Analysis/DemandedBits/basic.ll
test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll