Thumb assembly parsing and encoding for ASR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137889 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index fcca436ac55668636d141aace691c3d89e268df0..74d34e1443043daa2653a332e812452ed195b3ee 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2693,7 +2693,7 @@ StringRef ARMAsmParser::splitMnemonic(StringRef Mnemonic,
   // Next, determine if we have a carry setting bit. We explicitly ignore all
   // the instructions we know end in 's'.
   if (Mnemonic.endswith("s") &&
-      !(Mnemonic == "asrs" || Mnemonic == "cps" || Mnemonic == "mls" ||
+      !(Mnemonic == "cps" || Mnemonic == "mls" ||
         Mnemonic == "mrs" || Mnemonic == "smmls" || Mnemonic == "vabs" ||
         Mnemonic == "vcls" || Mnemonic == "vmls" || Mnemonic == "vmrs" ||
         Mnemonic == "vnmls" || Mnemonic == "vqabs" || Mnemonic == "vrecps" ||

diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index 340743ed0985634e5d507a8f7a00987e2b914dec..7899a550f2a7a150f90d3edbcc05c109ae48501e 100644 (file)
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -56,3 +56,23 @@ _func:
 
 @ CHECK: adr   r2, _baz                @ encoding: [A,0xa2]
             @   fixup A - offset: 0, value: _baz, kind: fixup_thumb_adr_pcrel_10
+
+
+@------------------------------------------------------------------------------
+@ ASR (immediate)
+@------------------------------------------------------------------------------
+        asrs r2, r3, #32
+        asrs r2, r3, #5
+        asrs r2, r3, #1
+
+@ CHECK: asrs  r2, r3, #32             @ encoding: [0x1a,0x10]
+@ CHECK: asrs  r2, r3, #5              @ encoding: [0x5a,0x11]
+@ CHECK: asrs  r2, r3, #1              @ encoding: [0x5a,0x10]
+
+
+@------------------------------------------------------------------------------
+@ ASR (register)
+@------------------------------------------------------------------------------
+        asrs r5, r2
+
+@ CHECK: asrs  r5, r2                  @ encoding: [0x15,0x41]

diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s
index a08a94689b2f4fcbed95f29527bc19db04dd6ae6..8d8edcbfedfe9e66a8cc93b6867cb4e2f9e3c566 100644 (file)
--- a/test/MC/ARM/thumb-diagnostics.s
+++ b/test/MC/ARM/thumb-diagnostics.s
@@ -18,3 +18,14 @@
 @ CHECK-ERRORS: error: instruction variant requires ARMv6 or later
 @ CHECK-ERRORS:         mov r2, r3
 @ CHECK-ERRORS:         ^
+
+
+@ Out of range immediates for ASR instruction.
+        asrs r2, r3, #33
+        asrs r2, r3, #0
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS:         asrs r2, r3, #33
+@ CHECK-ERRORS:                      ^
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS:         asrs r2, r3, #0
+@ CHECK-ERRORS:                      ^