Be more lenient on tied operand matching for MUL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138124 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 349513682493949ff20d7a3c0ef79a3465428d66..258d692b1261ff1c9ec84de07bda2f809d68a36e 100644 (file)
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2382,16 +2382,23 @@ cvtThumbMultiply(MCInst &Inst, unsigned Opcode,
   // The second source operand must be the same register as the destination
   // operand.
   if (Operands.size() == 6 &&
-      ((ARMOperand*)Operands[3])->getReg() !=
-      ((ARMOperand*)Operands[5])->getReg()) {
+      (((ARMOperand*)Operands[3])->getReg() !=
+       ((ARMOperand*)Operands[5])->getReg()) &&
+      (((ARMOperand*)Operands[3])->getReg() !=
+       ((ARMOperand*)Operands[4])->getReg())) {
     Error(Operands[3]->getStartLoc(),
-          "destination register must match second source register");
+          "destination register must match source register");
     return false;
   }
   ((ARMOperand*)Operands[3])->addRegOperands(Inst, 1);
   ((ARMOperand*)Operands[1])->addCCOutOperands(Inst, 1);
   ((ARMOperand*)Operands[4])->addRegOperands(Inst, 1);
-  Inst.addOperand(Inst.getOperand(0));
+  // If we have a three-operand form, use that, else the second source operand
+  // is just the destination operand again.
+  if (Operands.size() == 6)
+    ((ARMOperand*)Operands[5])->addRegOperands(Inst, 1);
+  else
+    Inst.addOperand(Inst.getOperand(0));
   ((ARMOperand*)Operands[2])->addCondCodeOperands(Inst, 2);
 
   return true;

diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s
index f7297d959e5840aabe92b071e2912fb163d4b520..e201f0b47231692d459d6f45fec5eea5c9fb2cce 100644 (file)
--- a/test/MC/ARM/thumb-diagnostics.s
+++ b/test/MC/ARM/thumb-diagnostics.s
@@ -65,6 +65,6 @@ error: invalid operand for instruction
 
 @ Mismatched source/destination operands for MUL instruction.
         muls r1, r2, r3
-@ CHECK-ERRORS: error: destination register must match second source register
+@ CHECK-ERRORS: error: destination register must match source register
 @ CHECK-ERRORS:         muls r1, r2, r3
 @ CHECK-ERRORS:              ^