2016-01-28 |
Hans Wennborg | Merging r258471: |
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2016-01-19 |
Hans Wennborg | Merging r257925, r257929, r257930, and r257997: |
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2016-01-05 |
Junmo Park | Remove extra whitespace. NFC. |
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2016-01-04 |
Geoff Berry | [AArch64] Optimize some simple TBZ/TBNZ cases. |
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2015-12-17 |
Matthew Simpson | Revert "[AArch64] Add DAG combine for extract extend... |
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2015-12-17 |
Matthew Simpson | [AArch64] Add DAG combine for extract extend pattern |
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2015-12-16 |
Manman Ren | CXX_FAST_TLS calling convention: performance improvemen... |
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2015-12-14 |
Geoff Berry | Remove dead function AArch64TargetLowering::getFunction... |
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2015-12-11 |
Hal Finkel | Revert r248483, r242546, r242545, and r242409 - absdiff... |
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2015-12-10 |
Pirama Arumuga Nainar | Fix fptosi, fptoui from f16 vectors to i8, i16 vectors |
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2015-12-09 |
Ahmed Bougacha | [AArch64][ARM] Don't base interleaved op legality on... |
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2015-12-04 |
Chad Rosier | [AArch64] Expand vector SDIVREM/UDIVREM operations. |
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2015-12-02 |
Tim Northover | AArch64: fix 128-bit shifts |
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2015-11-25 |
Artyom Skrobov | Expose isXxxConstant() functions from SelectionDAGNodes... |
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2015-11-17 |
Ahmed Bougacha | [AArch64] Promote f16 SELECT_CC CC operands when op... |
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2015-11-10 |
Tim Northover | AArch64: add experimental support for address tagging. |
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2015-11-09 |
Charlie Turner | [AArch64] Handle extract_subvector(..., 0) in ISel. |
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2015-11-07 |
Joseph Tremoulet | [WinEH] Update exception pointer registers |
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2015-10-27 |
Charlie Turner | [ARM] Expand ROTL and ROTR of vector value types |
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2015-10-26 |
Evgeniy Stepanov | [safestack] Fast access to the unsafe stack pointer... |
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2015-10-22 |
Craig Topper | Change makeLibCall to take an ArrayRef<SDValue> instead... |
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2015-10-16 |
Charlie Turner | [AArch64] Implement vector splitting on UADDV. |
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2015-10-15 |
Evgeniy Stepanov | Revert "[safestack] Fast access to the unsafe stack... |
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2015-10-15 |
Evgeniy Stepanov | [safestack] Fast access to the unsafe stack pointer... |
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2015-10-13 |
Duncan P. N. Exon... | AArch64: Remove implicit ilist iterator conversions... |
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2015-10-09 |
Jun Bum Lim | Improve ISel across lane float min/max reduction |
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2015-10-07 |
Chad Rosier | [AArch64] Fold a floating-point divide by power of... |
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2015-10-07 |
Chad Rosier | [AArch64] Fold a floating-point multiply by power of... |
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2015-10-07 |
Jeroen Ketema | [ARM][AArch64] Only lower to interleaved load/store... |
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2015-10-02 |
Chad Rosier | [ARM] Typo. NFC. |
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2015-09-25 |
Sanjay Patel | merge vector stores into wider vector stores and fix... |
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2015-09-22 |
Ahmed Bougacha | [AArch64] Emit clrex in the expanded cmpxchg fail block. |
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2015-09-14 |
Jun Bum Lim | Improve ISel using across lane min/max reduction |
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2015-09-11 |
Ahmed Bougacha | [CodeGen] Refactor TLI/AtomicExpand interface to make... |
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2015-09-11 |
Ahmed Bougacha | [CodeGen] Rename AtomicRMWExpansionKind to AtomicExpans... |
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2015-09-08 |
Jun Bum Lim | Remove white space (test commit) |
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2015-09-03 |
Chad Rosier | [AArch64] Improve ISel using across lane addition reduc... |
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2015-09-01 |
Ahmed Bougacha | [AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0. |
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2015-08-31 |
Matthias Braun | AArch64: Fix loads to lower NEON vector lanes using... |
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2015-08-26 |
Silviu Baranga | [AArch64] Unify the integer min/max vector selection... |
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2015-08-20 |
Matthias Braun | AArch64: Fix cmp;ccmp ordering |
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2015-08-20 |
Matthias Braun | AArch64: Do not create CCMP on multiple users. |
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2015-08-17 |
James Molloy | Remove hand-rolled matching for fmin and fmax. |
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2015-08-14 |
James Molloy | [AArch64] FMINNAN/FMAXNAN on f16 is not legal. |
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2015-08-13 |
Ahmed Bougacha | [AArch64] Also custom-lowering mismatched vector/f16... |
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2015-08-11 |
Alex Lorenz | PseudoSourceValue: Replace global manager with a manage... |
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2015-08-11 |
James Molloy | [AArch64] Match fminnum/fmaxnum for vector fminnm/fmaxn... |
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2015-08-11 |
James Molloy | [AArch64] Replace the custom AArch64ISD::FMIN/MAX nodes... |
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2015-08-08 |
Benjamin Kramer | Fix some comment typos. |
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2015-08-04 |
Sanjay Patel | wrap OptSize and MinSize attributes for easier and... |
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2015-08-04 |
Ahmed Bougacha | [AArch64] Add isel support for f16 indexed LD/ST. |
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2015-08-04 |
Ahmed Bougacha | [AArch64] Remove unnecessary "break". NFC. |
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2015-08-04 |
Ahmed Bougacha | [AArch64] Use SDValue bool operator. NFC. |
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2015-08-04 |
Ahmed Bougacha | [AArch64] Vector FCOPYSIGN supports Custom-lowering... |
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2015-08-03 |
Pete Cooper | Convert some AArch64 code to foreach loops. NFC. |
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2015-07-29 |
Akira Hatanaka | [AArch64] Define subtarget feature strict-align. |
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2015-07-28 |
Sanjay Patel | fix TLI's combineRepeatedFPDivisors interface to return... |
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2015-07-28 |
Chih-Hung Hsieh | Implement target independent TLS compatible with glibc... |
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2015-07-28 |
Adhemerval Zanella | Implement __builtin_thread_pointer |
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2015-07-24 |
Luke Cheeseman | When lowering vector shifts a check is performed to... |
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2015-07-20 |
Geoff Berry | Fix comment typo (test commit). NFC |
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2015-07-17 |
James Molloy | [AArch64] Use [SU]ABSDIFF nodes instead of intrinsics... |
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2015-07-16 |
Matthias Braun | AArch64: Implement conditional compare sequence matching. |
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2015-07-09 |
Pat Gavlin | Allow {e,r}bp as the target of {read,write}_register. |
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2015-07-09 |
Mehdi Amini | Re-instate the EVT parameter to getScalarShiftAmountTy... |
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2015-07-09 |
Mehdi Amini | Remove getDataLayout() from TargetLowering |
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2015-07-09 |
Mehdi Amini | Make isLegalAddressingMode() taking DataLayout as an... |
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2015-07-09 |
Mehdi Amini | Make TargetLowering::getShiftAmountTy() taking DataLayo... |
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2015-07-09 |
Mehdi Amini | Make TargetLowering::getPointerTy() taking DataLayout... |
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2015-07-05 |
Benjamin Kramer | [TargetLowering] StringRefize asm constraint getters. |
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2015-06-26 |
Pete Cooper | Add op_values() to iterate over the SDValue operands... |
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2015-06-26 |
Hao Liu | [AArch64] Lower interleaved memory accesses to ldN... |
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2015-06-19 |
Eric Christopher | Fix "the the" in comments. |
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2015-06-17 |
Matthias Braun | Revert "AArch64: Use CMP;CCMP sequences for and/or... |
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2015-06-16 |
Daniel Sanders | Clean up redundant copies of Triple objects. NFC |
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2015-06-16 |
Ahmed Bougacha | [AArch64] Generalize extract-high DUP extension to... |
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2015-06-01 |
Matthias Braun | AArch64: Use CMP;CCMP sequences for and/or/setcc trees. |
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2015-06-01 |
Luke Cheeseman | Re-commit of r238201 with fix for building with shared... |
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2015-06-01 |
Matt Arsenault | Add address space argument to isLegalAddressingMode |
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2015-05-26 |
Diego Novillo | Revert "Re-commit changes in r237579 with fix for bug... |
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2015-05-26 |
Luke Cheeseman | Re-commit changes in r237579 with fix for bug breaking... |
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2015-05-21 |
David Blaikie | [opaque pointer type] Allow gep_type_iterator to work... |
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2015-05-18 |
David Blaikie | Simplify IRBuilder::CreateCall* by using ArrayRef+initi... |
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2015-05-18 |
Oliver Stannard | Revert r237579, as it broke windows buildbots |
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2015-05-18 |
Oliver Stannard | [LLVM - ARM/AArch64] Add ACLE special register intrinsics |
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2015-05-15 |
James Molloy | Mark SMIN/SMAX/UMIN/UMAX nodes as legal and add pattern... |
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2015-05-14 |
Artyom Skrobov | Re-apply r237247 - [AArch64] Codegen VMAX/VMIN for... |
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2015-05-13 |
Silviu Baranga | Revert r237247 - [AArch64] Codegen VMAX/VMIN.. as it... |
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2015-05-13 |
Artyom Skrobov | [AArch64] Codegen VMAX/VMIN for safe math cases |
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2015-05-08 |
Arnold Schwaighofer | ScheduleDAGInstrs: In functions with tail calls PseudoS... |
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2015-05-07 |
Matthias Braun | Change getTargetNodeName() to produce compiler warnings... |
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2015-04-28 |
Sergey Dmitrouk | Reapply r235977 "[DebugInfo] Add debug locations to... |
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2015-04-28 |
Daniel Jasper | Revert "[DebugInfo] Add debug locations to constant... |
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2015-04-28 |
Sergey Dmitrouk | [DebugInfo] Add debug locations to constant SD nodes |
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2015-04-27 |
Ahmed Bougacha | [AArch64] Also combine vector selects fed by non-i1... |
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2015-04-27 |
Ahmed Bougacha | [AArch64] Don't assert when combining (v3f32 select... |
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2015-04-23 |
Pirama Arumuga Nainar | [AArch64] Handle vec4, vec8, vec16 *itofp for half |
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2015-04-17 |
Ahmed Bougacha | [AArch64] Avoid vector->load dependency cycles when... |
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2015-04-16 |
Ahmed Bougacha | [AArch64] Don't assert on f16 in DUP PerfectShuffle... |
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2015-04-13 |
Krzysztof Parzyszek | Allow memory intrinsics to be tail calls |
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