[ARM] Add ARMv8.2-A FP16 vector instructions
[oota-llvm.git] / lib / Target / ARM / ARMRegisterInfo.td
2015-12-16 Oliver Stannard[ARM] Add ARMv8.2-A FP16 vector instructions
2015-08-03 Tim NorthoverARM: prefer allocating VFP regs at stride 4 on Darwin.
2015-02-20 Eric ChristopherGet the cached subtarget off the MachineFunction rather...
2014-04-03 Jim GrosbachTidy up. Trailing whitespace.
2014-01-24 Alp TokerFix known typos
2013-11-11 Artyom Skrobov[ARM] Add support for MVFR2 which is new in ARMv8
2013-09-05 Tilmann SchellerReverting 190043 for now.
2013-09-05 Tilmann SchellerARM: Add GPR register class excluding LR for use with...
2013-08-22 Jim GrosbachARM: R9 is not safe to use for tcGPR.
2013-08-06 Mihai PopaSupport APSR_nzcv as operand for Thumb2 mrc. Deprecate...
2013-06-11 Mihai PopaThis patch adds support for FPINST/FPINST2 as operands...
2013-05-31 Ahmed BougachaAdd a way to define the bit range covered by a SubRegIndex.
2013-05-13 Mihai PopaThe purpose of the patch is to fix the syntax of ARM...
2012-10-26 Jakob Stoklund OlesenAdd GPRPair Register class to ARM.
2012-09-29 Bob WilsonAdd LLVM support for Swift.
2012-08-09 Eric ChristopherThis field isn't used anymore, use it with HWEncoding...
2012-05-04 Jakob Stoklund OlesenRemove the SubRegClasses field from RegisterClass descr...
2012-03-29 Jakob Stoklund OlesenPrefer even-odd D-register pairs.
2012-03-16 Jim GrosbachARM vmrs system registers mvfr0 and mvfr1 handling.
2012-03-06 Jakob Stoklund OlesenAllow the same types in DPair as in QPR.
2012-03-06 Lang HamesSplit fpscr into two registers: FPSCR and FPSCR_NZCV.
2012-03-05 Jim GrosbachARM refactor away a bunch of VLD/VST pseudo instructions.
2012-02-18 Jia LiuEmacs-tag and some comment fix for all ARM, CellSPU...
2012-02-02 Jakob Stoklund OlesenAdd pseudo-registers for pairs, triples, and quads...
2012-02-01 Jakob Stoklund OlesenMove ARM subreg index compositions to the SubRegIndex...
2012-01-18 Jakob Stoklund OlesenAdd a CoveredBySubRegs property to Register descriptions.
2012-01-13 Jakob Stoklund OlesenUse RegisterTuples to generate pseudo-registers.
2011-12-19 Jakob Stoklund OlesenRemove a register class that can just as well be synthe...
2011-08-30 Evan ChengChange ARM / Thumb2 addc / adde and subc / sube modelin...
2011-08-24 Jim GrosbachThumb1 ADD/SUB SP instructions are predicable in Thumb2...
2011-08-09 Owen AndersonCreate a new register class for the set of all GPRs...
2011-07-19 Jim GrosbachARM assembly parsing of MRS instruction.
2011-06-30 Eric ChristopherAdd support for the 'h' constraint.
2011-06-18 Jakob Stoklund OlesenSwitch ARM to using AltOrders instead of MethodBodies.
2011-06-15 Jakob Stoklund OlesenUse set operations instead of plain lists to enumerate...
2011-06-02 Jakob Stoklund OlesenFlag unallocatable register classes instead of giving...
2011-05-07 Jakob Stoklund OlesenEliminate the ARM sub-register indexes that are not...
2011-04-21 Devang PatelAs per ARM docs, register Dx is described as DW_OP_regx...
2011-04-20 Jakob Stoklund OlesenPrefer cheap registers for busy live ranges.
2011-01-20 Evan ChengSorry, several patches in one.
2011-01-18 Bruno Cardoso LopesCreate two new generic classes to represent the followi...
2010-10-12 Bob WilsonPR8359: The ARM backend may end up allocating registers...
2010-10-08 Bob WilsonChange register allocation order for ARM VFP and NEON...
2010-09-02 Jim GrosbachNow that register allocation properly considers reserve...
2010-09-02 Jim Grosbachtrivial cleanup
2010-09-01 Jim GrosbachSimplify the tGPR register class now that the register...
2010-08-17 Chris Lattnerfix emacs language spec's, patch by Edmund Grimley...
2010-08-10 Evan ChengRe-apply r110655 with fixes. Epilogue must restore...
2010-08-10 Daniel DunbarRevert r110655, "Fix ARM hasFP() semantics. It should...
2010-08-10 Evan ChengFix ARM hasFP() semantics. It should return true whenev...
2010-07-30 Jim GrosbachMany Thumb2 instructions can reference the full ARM...
2010-07-08 Bob WilsonClean up a comment.
2010-06-21 Dale JohannesenFix PR 7433. Silly typo in non-Darwin ARM tail call
2010-06-18 Evan ChengAllow ARM if-converter to be run after post allocation...
2010-06-15 Dale JohannesenNext round of tail call changes. Register used in...
2010-06-02 Jim GrosbachClean up 80 column violations. No functional change.
2010-05-26 Jakob Stoklund OlesenGive SubRegIndex names to all ARM subregisters. This...
2010-05-26 Jakob Stoklund OlesenReplace the SubRegSet tablegen class with a less error...
2010-05-26 Jakob Stoklund OlesenRevert "Replace the SubRegSet tablegen class with a...
2010-05-26 Jakob Stoklund OlesenReplace the SubRegSet tablegen class with a less error...
2010-05-25 Jakob Stoklund OlesenRemove NumberHack entirely.
2010-05-24 Jakob Stoklund OlesenSwitch SubRegSet to using symbolic SubRegIndices
2010-05-24 Jakob Stoklund OlesenLose the dummies
2010-05-24 Jakob Stoklund OlesenReplace the tablegen RegisterClass field SubRegClassLis...
2010-05-24 Jakob Stoklund OlesenFix a few places that depended on the numeric value...
2010-05-24 Jakob Stoklund OlesenSwitch ARMRegisterInfo.td to use SubRegIndex and elimin...
2010-05-14 Evan ChengTeach two-address pass to do some coalescing while...
2010-05-14 Evan ChengAdded a QQQQ register file to model 4-consecutive Q...
2010-05-13 Evan ChengAdd comment about the pseudo registers QQ, each of...
2010-05-06 Evan ChengRe-apply 103156 and 103157. 103156 didn't break anythin...
2010-05-06 Eric ChristopherRevert r103156 since it was breaking the build bots.
2010-05-06 Evan ChengAdding pseudo 256-bit registers QQ0 . . . QQ7 to repres...
2010-01-25 Johnny ChenMake it SP, LR, PC for GPR Register Class instead of...
2010-01-25 Johnny ChenFixed the order of GPR RegisterClass regs to be: ....
2010-01-13 Jakob Stoklund OlesenRemove the JustSP single-register regclass.
2009-12-22 Jakob Stoklund OlesenAdd a SPR register class to the ARM target.
2009-11-03 Evan ChengAdd QPR_8 as a superreg class of SPR_8 and DPR_8.
2009-11-02 Anton KorobeynikovDo not infer the target type for COPY_TO_REGCLASS from...
2009-10-24 Jim GrosbachRestrict Thumb1 register allocation to low registers...
2009-10-23 Jim GrosbachFIXME no longer applies. R12 and R3 are available for...
2009-10-19 Jim GrosbachEnable allocation of R3 in Thumb1
2009-09-13 Anton KorobeynikovFix merge problem
2009-09-13 Anton KorobeynikovDefine proper subreg sets for arm - this should fix...
2009-09-12 Anton KorobeynikovAdd QPR_VFP2 regclass and add copy_to_regclass nodes...
2009-09-08 Anton KorobeynikovAdd NEON 'laned' operations. This fixes another bunch...
2009-08-05 David GoodwinWhen using NEON for single-precision FP, the NEON resul...
2009-08-04 Evan ChengIn thumb mode, r7 is used as frame register. This fixes...
2009-07-29 Evan ChengAdd VFP3 D registers to the DPR register class.
2009-07-22 Evan ChengFix a obvious copy-n-paste bug.
2009-07-20 Evan ChengModel fpscr to prevent fcmped / fcmpezs etc from being...
2009-07-14 Bob WilsonFix an obvious copy-and-paste error.
2009-07-14 Bob WilsonRevert 75309.
2009-07-10 Bob WilsonAdd superclasses of ARM Neon quad registers. The Q2PR...
2009-06-22 Bob WilsonAdd support for ARM's Advanced SIMD (NEON) instruction...
2009-06-22 Bob WilsonFor Darwin on ARMv6 and newer, make register r9 availab...
2009-06-18 Evan ChengRemove UseThumbBacktraces. Just check if subtarget...
2009-06-08 Anton KorobeynikovThe attached patches implement most of the ARM AAPCS...
2009-06-05 Evan ChengChanging allocation ordering from r3 ... r0 back to...
2009-04-07 Jim GrosbachPR2985 / <rdar://problem/6584986>
2008-02-10 Dan GohmanRename MRegisterInfo to TargetRegisterInfo.
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