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(parent: 16277c4) | patch
ARM: Add GPR register class excluding LR for use with the ADR instruction.
authorTilmann Scheller <tilmann.scheller@googlemail.com>
Thu, 5 Sep 2013 11:10:31 +0000 (11:10 +0000)
committerTilmann Scheller <tilmann.scheller@googlemail.com>
Thu, 5 Sep 2013 11:10:31 +0000 (11:10 +0000)
commit10b5086e6e945b830ff909821240eff5c4a42bfc
treec7480522b0cf9d0240672fae665b76dadc4f9da0tree | snapshot
parent16277c4698f36a756c540fae326874774156aaedcommit | diff
ARM: Add GPR register class excluding LR for use with the ADR instruction.

This improves code generation for jump tables by avoiding the emission of "mov pc, lr" which could fool the processor into believing this is a return from a function causing mispredicts. The code generation logic for jump tables uses ADR to materialize the address of the jump target.

Patch by Daniel Stewart!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190043 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrThumb2.td diff | blob | history
lib/Target/ARM/ARMRegisterInfo.td diff | blob | history
lib/Target/ARM/Thumb2InstrInfo.cpp diff | blob | history
test/CodeGen/ARM/2013-09-04-Thumb2JumpTable.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors