Machine Model: Add MicroOpBufferSize and resource BufferSize.
[oota-llvm.git] / lib / CodeGen / ScheduleDAGInstrs.cpp
2013-06-15 Andrew TrickMachine Model: Add MicroOpBufferSize and resource Buffe...
2013-04-13 Andrew TrickMI-Sched: schedule physreg copies.
2013-02-12 Sergei LarinEqual treatment of labels and other terminators in...
2013-01-25 Andrew TrickScheduleDAG: colorize the DOT graph and improve formatting.
2013-01-25 Andrew TrickScheduleDAG: Added isBoundaryNode to conveniently detec...
2013-01-25 Andrew TrickSchedDFS: Complete support for nested subtrees.
2013-01-25 Andrew TrickMIsched: Improve the interface to SchedDFS analysis...
2013-01-25 Andrew TrickSchedDFS: Initial support for nested subtrees.
2013-01-25 Andrew TrickSchedDFS: Refactor and tweak the subtree selection...
2013-01-21 Michael IlsemanIntroduce a new data structure, the SparseMultiSet...
2013-01-02 Chandler CarruthMove all of the header files which are involved in...
2012-12-18 Andrew TrickMISched: add dependence to ExitSU to model live-out...
2012-12-10 Hal FinkelUse GetUnderlyingObjects in misched
2012-12-03 Chandler CarruthUse the new script to sort the includes of every file...
2012-12-01 Andrew Trickmisched: Fix RegisterPressureTracker handling of DebugVals.
2012-12-01 Andrew Trickmisched: Fix the DAG builder to handle an undef operand...
2012-11-28 Andrew Trickmisched: Analysis that partitions the DAG into subtrees.
2012-11-28 Andrew Trickmisched: rename ScheduleDAGILP to ScheduleDFS to prepar...
2012-11-28 Andrew Trickmisched: better alias analysis.
2012-11-15 Sergei LarinFix indeterminism in MI scheduler DAG construction.
2012-11-12 Andrew Trickmisched: Infrastructure for weak DAG edges.
2012-11-06 Andrew TrickScheduleDAG interface. Added OrderKind to distinguish...
2012-10-30 Chad Rosier[inline asm] Implement mayLoad and mayStore for inline...
2012-10-29 Preston GurdThis patch addresses a problem with the Post RA schedul...
2012-10-26 Nick LewyckyFix typo in comment.
2012-10-15 Andrew Trickmisched: ILP scheduler for experimental heuristics.
2012-10-10 Andrew Trickmisched: Use the TargetSchedModel interface wherever...
2012-10-09 Andrew Trickmisched: Remove LoopDependencies heuristic.
2012-10-08 Andrew Trickmisched: remove the unused getSpecialAddressLatency...
2012-10-08 Andrew Trickmisched: remove forceUnitLatencies. Defaults are handle...
2012-09-18 Andrew Trickmisched: Make ScheduleDAGInstrs use the TargetSchedule...
2012-09-11 Manman RenRelease build: guard dump functions with
2012-09-06 Manman RenRelease build: guard dump functions with "ifndef NDEBUG"
2012-08-29 Jakob Stoklund OlesenRename hasVolatileMemoryRef() to hasOrderedMemoryRef().
2012-08-23 Andrew TrickSimplify the computeOperandLatency API.
2012-07-30 Andrew TrickUse the latest MachineRegisterInfo APIs. No functionality.
2012-07-28 Andrew TrickReenable a basic SSA DAG builder optimization.
2012-06-14 Andrew Trickmisched: disable SSA check pending PR13112.
2012-06-13 Andrew Tricksched: fix latency of memory dependence chain edges...
2012-06-06 Andrew TrickMove RegisterPressure.h.
2012-06-06 Benjamin KramerRemove unused private fields found by clang's new ...
2012-06-05 Andrew Trickmisched: API for minimum vs. expected latency.
2012-06-01 Jakob Stoklund OlesenSwitch all register list clients to the new MC*Iterator...
2012-05-20 Jakob Stoklund OlesenUse LiveRangeQuery in ScheduleDAGInstrs.
2012-05-15 Andrew TrickAdd -enable-aa-sched-mi, off by default, for AliasAnaly...
2012-04-24 Andrew Trickmisched: DAG builder must special case earlyclobber
2012-04-24 Andrew Trickmisched: DAG builder support for tracking register...
2012-04-20 Andrew TrickNew and improved comment.
2012-04-20 Andrew TrickSparseSet: Add support for key-derived indexes and...
2012-04-20 Andrew Trickmisched: initialize BB
2012-04-13 Andrew Trickmisched: Added CanHandleTerminators.
2012-03-16 Benjamin KramerScheduleDAGInstrs: When adding uses we add them into...
2012-03-16 Andrew Trickmisched: add DAG edges from vreg defs to ExitSU.
2012-03-14 Andrew Trickmisched: implemented a framework for top-down or bottom...
2012-03-09 Andrew Trickmisched interface: rename Begin/End to RegionBegin...
2012-03-07 Andrew Trickmisched prep: Expose the ScheduleDAGInstrs interface...
2012-03-07 Andrew Trickmisched prep: Comment the ScheduleDAGInstrs interface.
2012-03-07 Andrew Trickmisched prep: Cleanup ScheduleDAGInstrs interface.
2012-03-07 Andrew Trickmisched prep: rename InsertPos to End.
2012-03-07 Andrew Trickmisched preparation: rename core scheduler methods...
2012-03-07 Andrew Trickmisched preparation: clarify ScheduleDAG and ScheduleDA...
2012-03-07 Andrew Trickmisched preparation: modularize schedule emission.
2012-03-07 Andrew TrickCleanup in preparation for misched: Move DAG visualizat...
2012-03-04 Craig TopperUse uint16_t to store register overlaps to reduce stati...
2012-02-24 Andrew TrickPostRA sched: speed up physreg tracking by not abusing...
2012-02-23 Andrew Trickmisched: cleanup reaching def computation
2012-02-23 Andrew TrickPostRASched: Convert physreg def/use tracking to Jakob...
2012-02-22 Jakob Stoklund OlesenDon't compute latencies for regmask operands.
2012-02-22 Andrew Trickmisched: Use SparseSet for VRegDegs for constant time...
2012-02-22 Andrew TrickComment from code review
2012-02-22 Andrew Trickmisched: DAG builder should not track dependencies...
2012-02-22 Andrew TrickInitialize SUnits before DAG building.
2012-02-21 Andrew TrickClear virtual registers after they are no longer refere...
2012-01-14 Andrew Trickmisched: Initial code for building an MI level scheduli...
2012-01-14 Andrew TrickMove physreg dependency generation into aptly named...
2012-01-14 Andrew Trickmisched: Added ScheduleDAGInstrs::IsPostRA
2012-01-07 Evan ChengAdded a late machine instruction copy propagation pass...
2012-01-05 Chandler CarruthRemove an unused variable.
2012-01-05 Andrew TrickMinor postra scheduler cleanup. It could result in...
2011-12-14 Evan ChengModel ARM predicated write as read-mod-write. e.g.
2011-12-14 Evan ChengAllow target to specify register output dependency...
2011-12-14 Evan Cheng- Add MachineInstrBundle.h and MachineInstrBundle.cpp...
2011-12-07 Evan ChengAdd bundle aware API for querying instruction propertie...
2011-12-06 Evan ChengFirst chunk of MachineInstr bundle support.
2011-12-02 Hal Finkelmake sure ScheduleDAGInstrs::EmitSchedule does not...
2011-10-07 Andrew TrickPostRA scheduler fix. Clear stale loop dependencies.
2011-10-07 Andrew Trickwhitespace
2011-07-01 Evan ChengRename TargetSubtarget to TargetSubtargetInfo for consi...
2011-06-29 Evan ChengSink SubtargetFeature and TargetInstrItineraries (renam...
2011-06-28 Evan Cheng- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
2011-06-02 Devang PatelRemove dead code.
2011-06-02 Devang PatelUpdate DBG_VALUEs while breaking anti dependencies.
2011-06-02 Devang PatelDuring post RA scheduling, do not try to chase reg...
2011-05-06 Andrew TrickAdded an assertion, and updated a comment.
2011-05-05 Andrew TrickARM post RA scheduler compile time fix.
2011-05-05 Andrew Trickwhitespace
2011-04-15 Chris LattnerFix a ton of comment typos found by codespell. Patch by
2011-01-07 Evan ChengDo not model all INLINEASM instructions as having unmod...
2010-12-15 Dan GohmanMove Value::getUnderlyingObject to be a standalone
2010-11-03 Evan ChengTwo sets of changes. Sorry they are intermingled.
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