Initial modifications to MCAssembler and TargetMachine for the MCJIT.
[oota-llvm.git] / include / llvm / Target /
2010-07-22 Reid KlecknerInitial modifications to MCAssembler and TargetMachine...
2010-07-21 Evan ChengTeach bottom up pre-ra scheduler to track register...
2010-07-20 Eric ChristopherGrammar.
2010-07-20 Eric ChristopherConstify some arguments.
2010-07-19 Evan ChengARM has to provide its own TargetLowering::findRepresen...
2010-07-19 Evan ChengTeach computeRegisterProperties() to compute "represent...
2010-07-19 Daniel DunbarTblGen/AsmMatcher: Add support for honoring instruction...
2010-07-19 Daniel DunbarTarget: Give the TargetAsmParser access to the TargetMa...
2010-07-16 Jakob Stoklund OlesenRemove the isMoveInstr() hook.
2010-07-16 Bill WendlingRename DBG_LABEL PROLOG_LABEL, because it's only used...
2010-07-16 Jakob Stoklund OlesenRemove remaining calls to TII::isMoveInstr.
2010-07-15 Evan ChengSplit -enable-finite-only-fp-math to two options:
2010-07-15 Eric Christopher80-col.
2010-07-14 Benjamin KramerDon't pass StringRef by reference.
2010-07-13 Evan ChengUpdate comment.
2010-07-12 Rafael EspindolaFix a typo and fit in 80 columns. Found by Bob Wilson.
2010-07-12 Daniel DunbarMC: Add MCAsmParserExtension, a base class for all...
2010-07-12 Rafael EspindolaConvert the last use of getPhysicalRegisterRegClass...
2010-07-11 Jakob Stoklund OlesenRemove TargetInstrInfo::copyRegToReg entirely.
2010-07-11 Rafael EspindolaMake getPhysicalRegisterRegClass non-virtual. Should...
2010-07-11 Jakob Stoklund OlesenRemove copyRegToReg from TargetInstrInfo so it is not...
2010-07-11 Rafael EspindolaFix va_arg for doubles. With this patch VAARG nodes...
2010-07-10 Dan GohmanReapply bottom-up fast-isel, with several fixes for...
2010-07-09 Jakob Stoklund OlesenAutomatically fold COPY instructions into stack load...
2010-07-09 Jakob Stoklund OlesenChange TII::foldMemoryOperand API to require the machin...
2010-07-09 Bob Wilson--- Reverse-merging r107947 into '.':
2010-07-09 Dan GohmanRe-apply bottom-up fast-isel, with fixes. Be very caref...
2010-07-08 Jakob Stoklund OlesenImplement X86InstrInfo::copyPhysReg
2010-07-08 Jakob Stoklund OlesenConvert EXTRACT_SUBREG to COPY when emitting machine...
2010-07-08 Jakob Stoklund OlesenAdd TargetInstrInfo::copyPhysReg hook and use it from...
2010-07-08 Dan GohmanRevert 107840 107839 107813 107804 107800 107797 107791.
2010-07-07 Dan GohmanAdd X86FastISel support for return statements. This...
2010-07-07 Dan GohmanSimplify FastISel's constructor by giving it a Function...
2010-07-07 Dan GohmanSplit the SDValue out of OutputArg so that SelectionDAG...
2010-07-07 Dan GohmanMove ArgFlagsTy, OutputArg, and InputArg out of Selecti...
2010-07-06 Dan GohmanCanLowerReturn doesn't need a SelectionDAG; it just...
2010-07-06 Dan GohmanMake getMinimalPhysRegClass' comment mention what makes...
2010-07-06 Eric ChristopherFix up -fstack-protector on linux to use the segment
2010-07-02 Jakob Stoklund OlesenAdd a new target independent COPY instruction and code...
2010-07-02 Jakob Stoklund OlesenClean up TargetOpcodes.h a bit, and limit the number...
2010-06-29 Bill WendlingRevert r107205 and r107207.
2010-06-29 Bill WendlingIntroducing the "linker_weak" linkage type. This will...
2010-06-29 Rafael EspindolaAdd a VT argument to getMinimalPhysRegClass and replace...
2010-06-25 Evan ChengChange if-conversion block size limit checks to add...
2010-06-25 Dale JohannesenThe hasMemory argument is irrelevant to how the argument
2010-06-24 Bob WilsonEdit and clarify comments for TargetInstrInfo methods:
2010-06-24 Dan GohmanReapply r106634, now that the bug it exposed is fixed.
2010-06-23 Daniel DunbarRevert r106263, "Fold the ShrinkDemandedOps pass into...
2010-06-23 Jim GrosbachSome targets don't require the fencing MEMBARRIER instr...
2010-06-23 Jim Grosbachremove trailing whitespace
2010-06-22 Evan ChengTail merging pass shall not break up IT blocks. rdar...
2010-06-21 Eric ChristopherRemove isTwoAddress from llvm.
2010-06-18 Evan ChengAllow ARM if-converter to be run after post allocation...
2010-06-18 Dan GohmanStart TargetRegisterClass indices at 0 instead of 1...
2010-06-18 Dan GohmanFold the ShrinkDemandedOps pass into the regular DAGCom...
2010-06-17 Stuart HastingsAdd a DebugLoc parameter to TargetInstrInfo::InsertBran...
2010-06-14 Bob WilsonFix a comment typo.
2010-06-12 Chris Lattnerdeclare a class with 'class' instead of struct to avoid...
2010-06-12 Evan ChengAllow target to provide its own hazard recognizer to...
2010-06-09 Evan ChengAllow target to place 2-address pass inserted copies...
2010-06-09 Bill Wendling- Fix description of SUBREG_TO_REG. It's not going...
2010-06-08 Bruno Cardoso LopesReapply r105521, this time appending "LLU" to 64 bit
2010-06-05 Chris Lattnerrevert r105521, which is breaking the buildbots with...
2010-06-05 Bruno Cardoso LopesInitial AVX support for some instructions. No patterns...
2010-06-02 Jakob Stoklund OlesenSlightly change the meaning of the reMaterialize target...
2010-06-02 Bob WilsonRename canCombinedSubRegIndex method to something more...
2010-06-02 Rafael EspindolaRemove uses of getCalleeSavedRegClasses from outside the
2010-05-28 Jakob Stoklund OlesenAdd a TargetRegisterInfo::composeSubRegIndices hook...
2010-05-26 Daniel DunbarMC: Add TargetMachine support for setting the value...
2010-05-26 Daniel DunbarMC: Change RelaxInstruction to only take the input...
2010-05-26 Daniel DunbarMC: Simplify MayNeedRelaxation to not provide the fixup...
2010-05-26 Jakob Stoklund OlesenReplace the SubRegSet tablegen class with a less error...
2010-05-26 Daniel DunbarMC: Eliminate MCAsmFixup, replace with MCFixup.
2010-05-26 Jakob Stoklund OlesenRevert "Replace the SubRegSet tablegen class with a...
2010-05-26 Jakob Stoklund OlesenReplace the SubRegSet tablegen class with a less error...
2010-05-25 Jakob Stoklund OlesenDrop the SuperregHashTable. It is essentially the same...
2010-05-25 Jakob Stoklund OlesenPrint symbolic SubRegIndex names on machine operands.
2010-05-25 Jakob Stoklund OlesenRemove NumberHack entirely.
2010-05-24 Jakob Stoklund OlesenSwitch SubRegSet to using symbolic SubRegIndices
2010-05-24 Jakob Stoklund OlesenReplace the tablegen RegisterClass field SubRegClassLis...
2010-05-24 Jakob Stoklund OlesenAdd the SubRegIndex TableGen class.
2010-05-22 Daniel Dunbartblgen/AsmMatcher: Change AsmOperandClass to allow...
2010-05-22 Evan ChengImplement @llvm.returnaddress. rdar://8015977.
2010-05-22 Eric ChristopherAdd a new section and accessor for TLS data.
2010-05-21 Matt FlemingCurrently, createMachOStreamer() is invoked directly...
2010-05-20 Evan ChengAllow targets more controls on what nodes are scheduled...
2010-05-20 Daniel Dunbartblgen/Target: Add a isAsmParserOnly bit, and teach...
2010-05-20 Evan ChengAdd a hybrid bottom up scheduler that reduce register...
2010-05-19 Evan ChengCode refactoring: pull SchedPreference enum from Target...
2010-05-15 Evan ChengAllow TargetLowering::getRegClassFor() to be called...
2010-05-14 Evan ChengTeach two-address pass to do some coalescing while...
2010-05-14 Evan ChengGet rid of the bit twiddling to read / set OpActions...
2010-05-13 Evan ChengEliminate use of magic numbers to access OpActions...
2010-05-13 Evan ChengFix up LoadExtActions, TruncStoreActions, and IndexedMo...
2010-05-13 Evan Cheng80 col violation.
2010-05-12 Daniel DunbarMC/Mach-O/x86_64: Add a new hook for checking whether...
2010-05-11 Dan GohmanRemove the "WantsWholeFile" concept, as it's no longer...
2010-05-11 Dan GohmanTrim #includes and forward declarations.
2010-05-11 Dan GohmanFix a comment.
2010-05-11 Dan GohmanImplement a bunch more TargetSelectionDAGInfo infrastru...
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