Remove isTwoAddress from llvm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106470 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/docs/TableGenFundamentals.html b/docs/TableGenFundamentals.html
index 81f3cfe0448d8d735811572b1c52d5749ae9e389..05790e5ae4d3a51f055130e6a9c9b25b8d1a4787 100644 (file)
--- a/docs/TableGenFundamentals.html
+++ b/docs/TableGenFundamentals.html
@@ -144,7 +144,6 @@ file prints this (at the time of this writing):</p>
   <b>bit</b> mayLoad = 0;
   <b>bit</b> mayStore = 0;
   <b>bit</b> isImplicitDef = 0;
-  <b>bit</b> isTwoAddress = 1;
   <b>bit</b> isConvertibleToThreeAddress = 1;
   <b>bit</b> isCommutable = 1;
   <b>bit</b> isTerminator = 0;

diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index 6379459488fc3b9d846983e8ba362b331f83e92d..1d1e1f86130c2340d4dccf70ee782374a41f9e50 100644 (file)
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -203,7 +203,6 @@ class Instruction {
   bit canFoldAsLoad = 0;    // Can this be folded as a simple memory operand?
   bit mayLoad      = 0;     // Is it possible for this inst to read memory?
   bit mayStore     = 0;     // Is it possible for this inst to write memory?
-  bit isTwoAddress = 0;     // Is this a two address instruction?
   bit isConvertibleToThreeAddress = 0;  // Can this 2-addr instruction promote?
   bit isCommutable = 0;     // Is this 3 operand instruction commutable?
   bit isTerminator = 0;     // Is this part of the terminator for a basic block?

diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index 99d196c3ceb435722fce8c81d0af5c3a2144bf9c..35b54a5427171994713e9fc548b4782bfc92bf76 100644 (file)
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -107,7 +107,6 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   canFoldAsLoad = R->getValueAsBit("canFoldAsLoad");
   mayLoad      = R->getValueAsBit("mayLoad");
   mayStore     = R->getValueAsBit("mayStore");
-  bool isTwoAddress = R->getValueAsBit("isTwoAddress");
   isPredicable = R->getValueAsBit("isPredicable");
   isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
   isCommutable = R->getValueAsBit("isCommutable");
@@ -212,16 +211,6 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
   // Parse Constraints.
   ParseConstraints(R->getValueAsString("Constraints"), this);
 
-  // For backward compatibility: isTwoAddress means operand 1 is tied to
-  // operand 0.
-  if (isTwoAddress) {
-    if (!OperandList[1].Constraints[0].isNone())
-      throw R->getName() + ": cannot use isTwoAddress property: instruction "
-            "already has constraint set!";
-    OperandList[1].Constraints[0] =
-      CodeGenInstruction::ConstraintInfo::getTied(0);
-  }
-
   // Parse the DisableEncoding field.
   std::string DisableEncoding = R->getValueAsString("DisableEncoding");
   while (1) {