tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
authorDaniel Dunbar <daniel@zuster.org>
Thu, 20 May 2010 20:20:32 +0000 (20:20 +0000)
committerDaniel Dunbar <daniel@zuster.org>
Thu, 20 May 2010 20:20:32 +0000 (20:20 +0000)
commit4072886a690a853c57c79a87a6423a7bfe0ce61f
treec984ece9fc7295769df2fa262ef47ec77c31feb3
parentc6519f916b5922de81c53547fd21364994195a70
tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor
it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104270 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/Target.td
utils/TableGen/X86RecognizableInstr.cpp