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Support REG_SEQUENCE in tablegen.
[oota-llvm.git] / lib / Target / R600 / SIInstructions.td
2014-06-10 Matt ArsenaultR600/SI: Implement i64 ctpop blob | commitdiff | raw
2014-06-10 Matt ArsenaultR600/SI: Use bcnt instruction for ctpop blob | commitdiff | raw | diff to current
2014-06-10 Matt ArsenaultR600: Handle fcopysign blob | commitdiff | raw | diff to current
2014-06-10 Matt ArsenaultR600/SI: Handle sign_extend and zero_extend to i64... blob | commitdiff | raw | diff to current
2014-06-09 Matt ArsenaultR600/SI: Rename VOP3 helper class to be more general blob | commitdiff | raw | diff to current
2014-06-09 Matt ArsenaultR600/SI: Keep 64-bit not on SALU blob | commitdiff | raw | diff to current
2014-06-05 Matt ArsenaultR600/SI: Match rsq instructions blob | commitdiff | raw | diff to current
2014-05-31 Matt ArsenaultR600/SI: Remove redundant patterns blob | commitdiff | raw | diff to current
2014-05-31 Matt ArsenaultR600/SI: Fix [s|u]int_to_fp for i1 blob | commitdiff | raw | diff to current
2014-05-29 Matt ArsenaultR600/SI: Fix pattern variable names. blob | commitdiff | raw | diff to current
2014-05-22 Matt ArsenaultR600: Add intrinsics for mad24 blob | commitdiff | raw | diff to current
2014-05-22 Matt ArsenaultR600/SI: Move instruction pattern to instruction definition blob | commitdiff | raw | diff to current
2014-05-22 Matt ArsenaultR600/SI: Match fp_to_uint / uint_to_fp for f64 blob | commitdiff | raw | diff to current
2014-05-16 Tom StellardR600/SI: Refactor the VOP3_32 tablegen class blob | commitdiff | raw | diff to current
2014-05-16 Tom StellardR600/SI: Add a PredicateControl class for managing... blob | commitdiff | raw | diff to current
2014-05-16 Tom StellardR600/SI: Move tablegen patterns away from instruction... blob | commitdiff | raw | diff to current
2014-05-16 Tom StellardR600/SI: Remove unused instruction blob | commitdiff | raw | diff to current
2014-05-16 Tom StellardR600/SI: Promote f32 SELECT to i32 blob | commitdiff | raw | diff to current
2014-05-16 Tom StellardR600/SI: Remove duplicate pattern blob | commitdiff | raw | diff to current
2014-05-15 Tom StellardR600/SI: Stop using VSrc_* as the default register... blob | commitdiff | raw | diff to current
2014-05-15 Tom StellardR600/SI: Use VALU instructions for i1 ops blob | commitdiff | raw | diff to current
2014-05-10 Vincent LejeuneR600/SI: Prettier display of input modifiers blob | commitdiff | raw | diff to current
2014-05-10 Vincent LejeuneR600/SI: Use pseudo instruction for fabs/clamp/fneg blob | commitdiff | raw | diff to current
2014-05-09 Tom StellardR600/SI: Fix SMRD pattern for offsets > 32 bits blob | commitdiff | raw | diff to current
2014-05-02 Tom StellardR600/SI: Only create one instruction when spilling... blob | commitdiff | raw | diff to current
2014-04-30 Tom StellardR600/SI: Use VALU instructions for copying i1 values blob | commitdiff | raw | diff to current
2014-04-29 Tom StellardR600/SI: Custom lower SI_IF and SI_ELSE to avoid machin... blob | commitdiff | raw | diff to current
2014-04-29 Tom StellardR600/SI: Only select SALU instructions in the entry... blob | commitdiff | raw | diff to current
2014-04-22 Tom StellardR600/SI: Reorganize SIInstructions.td blob | commitdiff | raw | diff to current
2014-04-22 Matt ArsenaultR600: Make sign_extend_inreg legal. blob | commitdiff | raw | diff to current
2014-04-18 Matt ArsenaultR600/SI: Match sign_extend_inreg to s_sext_i32_i8 and... blob | commitdiff | raw | diff to current
2014-04-17 Tom StellardR600/SI: Stop using i128 as the resource descriptor... blob | commitdiff | raw | diff to current
2014-04-17 Matt ArsenaultR600/SI: f64 frint is legal on CI blob | commitdiff | raw | diff to current
2014-04-11 Matt ArsenaultR600/SI: Refactor SOPC classes slightly. blob | commitdiff | raw | diff to current
2014-04-09 Matt ArsenaultR600/SI: Match not instruction. blob | commitdiff | raw | diff to current
2014-04-07 Tom StellardR600: Match 24-bit arithmetic patterns in a Target... blob | commitdiff | raw | diff to current
2014-04-03 Tom StellardR600/SI: Lower 64-bit immediates using REG_SEQUENCE blob | commitdiff | raw | diff to current
2014-03-31 Matt ArsenaultR600/SI: Remove leftover pattern splitting 64-bit ors. blob | commitdiff | raw | diff to current
2014-03-31 Matt ArsenaultR600: Add target nodes for BFM and BFI blob | commitdiff | raw | diff to current
2014-03-31 Tom StellardR600/SI: Lower i64 SELECT by bitcasting to a vector... blob | commitdiff | raw | diff to current
2014-03-24 Matt ArsenaultR600/SI: Fix 64-bit bit ops that require the VALU. blob | commitdiff | raw | diff to current
2014-03-24 Tom StellardR600/SI: Promote fp64 SELECT to i64 blob | commitdiff | raw | diff to current
2014-03-21 Matt ArsenaultR600/SI: Move instruction patterns to scalar versions. blob | commitdiff | raw | diff to current
2014-03-19 Matt ArsenaultR600/SI: Add unused LDS 2 form instructions. blob | commitdiff | raw | diff to current
2014-03-19 Matt ArsenaultR600/SI: Add support for 64-bit LDS writes blob | commitdiff | raw | diff to current
2014-03-19 Matt ArsenaultR600/SI: Add support for 64-bit LDS loads. blob | commitdiff | raw | diff to current
2014-03-19 Matt ArsenaultR600/SI: Match i16 immediate offset of LDS instructions. blob | commitdiff | raw | diff to current
2014-03-19 Matt ArsenaultR600/SI: Merge offset0 and offset1 fields for single... blob | commitdiff | raw | diff to current
2014-03-17 Matt ArsenaultR600: Match sign_extend_inreg to BFE instructions blob | commitdiff | raw | diff to current
2014-03-17 Tom StellardR600/SI: Use correct dest register class for V_READFIRS... blob | commitdiff | raw | diff to current
2014-03-07 Tom StellardR600/SI: Using SGPRs is illegal for instructions that... blob | commitdiff | raw | diff to current
2014-02-27 Michel DanzerR600/SI: Optimize SI_KILL for constant operands blob | commitdiff | raw | diff to current
2014-02-24 Matt ArsenaultR600/SI - Add new CI arithmetic instructions. blob | commitdiff | raw | diff to current
2014-02-13 Tom StellardR600/SI: Expand all v8[if]32 operations blob | commitdiff | raw | diff to current
2014-02-13 Tom StellardR600/SI: Add a pattern for i32 anyext blob | commitdiff | raw | diff to current
2014-02-06 Tom StellardR600/SI: Add a MUBUF store pattern for Reg+Imm offsets blob | commitdiff | raw | diff to current
2014-02-06 Tom StellardR600/SI: Add a MUBUF store pattern for Imm offsets blob | commitdiff | raw | diff to current
2014-02-06 Tom StellardR600/SI: Add a MUBUF load pattern for Reg+Imm offsets blob | commitdiff | raw | diff to current
2014-02-06 Tom StellardR600/SI: Use immediates offsets for SMRD instructions... blob | commitdiff | raw | diff to current
2014-02-05 Michel DanzerR600/SI: Add pattern for zero-extending i1 to i32 blob | commitdiff | raw | diff to current
2014-02-04 Michel DanzerR600/SI: Fix fneg for 0.0 blob | commitdiff | raw | diff to current
2014-02-02 Matt ArsenaultR600/SI: Fix insertelement with dynamic indices. blob | commitdiff | raw | diff to current
2014-01-28 Michel DanzerR600/SI: Add pattern for truncating i32 to i1 blob | commitdiff | raw | diff to current
2014-01-27 Michel DanzerR600/SI: Add intrinsic for BUFFER_LOAD_DWORD* instructions blob | commitdiff | raw | diff to current
2014-01-27 Michel DanzerR600/SI: Add intrinsic for S_SENDMSG instruction blob | commitdiff | raw | diff to current
2013-12-19 Matt ArsenaultR600/SI: Make private pointers be 32-bit. blob | commitdiff | raw | diff to current
2013-12-16 Matt ArsenaultFix typo in instruction name. blob | commitdiff | raw | diff to current
2013-11-27 Tom StellardR600/SI: Implement spilling of SGPRs v5 blob | commitdiff | raw | diff to current
2013-11-27 Tom StellardR600/SI: Use SGPR_32 register class for 32-bit SMRD... blob | commitdiff | raw | diff to current
2013-11-22 Tom StellardR600/SI: Fixing handling of condition codes blob | commitdiff | raw | diff to current
2013-11-18 Matt ArsenaultR600/SI: Specify SSrc operands blob | commitdiff | raw | diff to current
2013-11-18 Matt ArsenaultR600/SI: Match addc to S_ADD_U32. blob | commitdiff | raw | diff to current
2013-11-18 Matt ArsenaultR600/SI: Match adde/sube to S_ADDC_U32/S_SUBB_U32 blob | commitdiff | raw | diff to current
2013-11-18 Matt ArsenaultR600/SI: Specify S_ADD/S_SUB set SCC and add is commutable blob | commitdiff | raw | diff to current
2013-11-18 Matt ArsenaultR600/SI: Move patterns to match add / sub to scalar... blob | commitdiff | raw | diff to current
2013-11-14 Matt ArsenaultR600/SI: Specify S_ADDK/S_MULK set SCC and are commutable blob | commitdiff | raw | diff to current
2013-11-13 Tom StellardR600/SI: Add support for private address space load... blob | commitdiff | raw | diff to current
2013-11-13 Tom StellardR600/SI: Prefer SALU instructions for bit shift operations blob | commitdiff | raw | diff to current
2013-10-29 Tom StellardR600/SI: Add compute support for CI v2 blob | commitdiff | raw | diff to current
2013-10-23 Tom StellardR600: Fix handling of vector kernel arguments blob | commitdiff | raw | diff to current
2013-10-23 Tom StellardR600/SI: Add support for i64 bitwise or blob | commitdiff | raw | diff to current
2013-10-23 Tom StellardR600/SI: Use S_LOAD_DWORD instructions for v8i32 and... blob | commitdiff | raw | diff to current
2013-10-15 Matt ArsenaultFix typo blob | commitdiff | raw | diff to current
2013-10-13 Vincent LejeuneR600: improve dump of S_WAITCNT blob | commitdiff | raw | diff to current
2013-10-11 Matt ArsenaultFix typo blob | commitdiff | raw | diff to current
2013-10-10 Matt ArsenaultR600: Fix trunc i64 to i32 on SI blob | commitdiff | raw | diff to current
2013-10-10 Tom StellardR600/SI: Define a separate MIMG instruction for each... blob | commitdiff | raw | diff to current
2013-09-12 Tom StellardR600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL trans... blob | commitdiff | raw | diff to current
2013-09-06 Aaron WatryR600: Add support for LDS atomic subtract blob | commitdiff | raw | diff to current
2013-09-05 Tom StellardR600: Add support for local memory atomic add blob | commitdiff | raw | diff to current
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory loads blob | commitdiff | raw | diff to current
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory stores blob | commitdiff | raw | diff to current
2013-08-26 Tom StellardSelectionDAG: Use correct pointer size when lowering... blob | commitdiff | raw | diff to current
2013-08-16 Michel DanzerR600/SI: Add pattern for xor of i1 blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardRevert "R600/SI: Fix incorrect encoding of DS_WRITE_B32... blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardR600/SI: Fix incorrect encoding of DS_WRITE_B32 instruc... blob | commitdiff | raw | diff to current
2013-08-16 Tom StellardR600: Add support for i16 and i8 global stores blob | commitdiff | raw | diff to current
2013-08-14 Tom StellardR600/SI: Replace v1i32 type with i32 in imageload and... blob | commitdiff | raw | diff to current
2013-08-14 Tom StellardR600/SI: Convert v16i8 resource descriptors to i128 blob | commitdiff | raw | diff to current
2013-08-14 Tom StellardR600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2 blob | commitdiff | raw | diff to current
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