Eliminate some deep std::vector copies. NFC.
[oota-llvm.git] / lib / Target / R600 / R600ControlFlowFinalizer.cpp
2014-10-03 Benjamin KramerEliminate some deep std::vector copies. NFC.
2014-08-05 Eric ChristopherHave MachineFunction cache a pointer to the subtarget...
2014-08-04 Eric ChristopherRemove the TargetMachine forwards for TargetSubtargetIn...
2014-07-13 Matt ArsenaultR600: Make ShaderType private
2014-06-13 Tom StellardR600: Move AMDGPUInstrInfo from AMDGPUTargetMachine...
2014-04-29 Craig Topper[C++11] Add 'override' keywords and remove 'virtual...
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition.
2014-04-22 Chandler Carruth[Modules] Fix potential ODR violations by sinking the...
2014-01-23 Tom StellardR600: Correctly handle vertex fetch clauses the precede...
2014-01-23 Tom StellardR600: Recommit 199842: Add work-around for the CF stack...
2014-01-22 Tom StellardRevert "R600: Add work-around for the CF stack entry...
2014-01-22 Tom StellardR600: Add work-around for the CF stack entry HW bug
2014-01-22 Tom StellardR600: Refactor stack size calculation
2014-01-22 Tom StellardR600: CF_PUSH is the same on Evergreen and Cayman
2013-12-02 Vincent LejeuneR600: Workaround for cayman loop bug
2013-08-16 Tom StellardR600: Add IsExport bit to TableGen instruction definitions
2013-08-16 Tom StellardR600: Change the RAT instruction assembly names so...
2013-08-01 Tom StellardR600: Add 64-bit float load/store support
2013-07-31 Vincent LejeuneR600: Remove predicated_break inst
2013-07-19 Vincent LejeuneR600: Don't emit empty then clause and use alu_pop_after
2013-07-15 Craig TopperMake some arrays 'static const'
2013-07-09 Vincent LejeuneR600: Do not predicated basic block with multiple alu...
2013-06-14 Tom StellardR600: Use EXPORT_RAT_INST_STORE_DWORD for stores on...
2013-06-07 Vincent LejeuneR600: Anti dep better handled in tex clause
2013-06-07 Tom StellardR600: Rework subtarget info and remove AMDILDevice...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-06-03 Vincent LejeuneR600: CALL_FS consumes a stack size entry
2013-05-23 Tom StellardR600: Fix R600ControlFlowFinalizer not considering...
2013-05-23 Benjamin KramerMove passes from namespace llvm into anonymous namespac...
2013-05-23 Aaron BallmanSetting the default value (fixes CRT assertions about...
2013-05-17 Vincent LejeuneR600: Some factorization
2013-05-17 Vincent LejeuneR600: Factorize Fetch size limit inside AMDGPUSubTarget
2013-05-02 Vincent LejeuneR600: Signed literals are 64bits wide
2013-04-30 Vincent LejeuneR600: use native for alu
2013-04-30 Vincent LejeuneR600: Take inner dependency into tex/vtx clauses
2013-04-30 Vincent LejeuneR600: Turn TEX/VTX into native instructions
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote...
2013-04-29 Tom StellardR600: Use correct CF_END instruction on Northern Island...
2013-04-23 Vincent LejeuneR600: Use .AMDGPU.config section to emit stacksize
2013-04-23 Vincent LejeuneR600: Add CF_END
2013-04-11 NAKAMURA TakumiR600ControlFlowFinalizer.cpp: Fix a warning. [-Wunused...
2013-04-11 NAKAMURA TakumiWhitespace.
2013-04-10 Vincent LejeuneR600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when...
2013-04-08 Vincent LejeuneR600: Control Flow support for pre EG gen
2013-04-04 Vincent LejeuneR600: Fix wrong address when substituting ENDIF
2013-04-04 Vincent LejeuneR600: Take export into account when computing cf address
2013-04-03 Vincent LejeuneR600: Simplify data structure and add DEBUG to R600Cont...
2013-04-03 Vincent LejeuneR600: Consider KILLGT as an ALU instruction
2013-04-01 Vincent LejeuneR600: Add support for native control flow