R600: Add IsExport bit to TableGen instruction definitions
authorTom Stellard <thomas.stellard@amd.com>
Fri, 16 Aug 2013 01:11:51 +0000 (01:11 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Fri, 16 Aug 2013 01:11:51 +0000 (01:11 +0000)
commite7ac2ed1c268891a856ab38db1e34372a79da86a
tree1cde7a48a8bb2345527ee7e8b79cb943a5b168f0
parente560d526a1aebf45e5333ab7b24689be930a8026
R600: Add IsExport bit to TableGen instruction definitions

Tested-by: Aaron Watry <awatry@gmail.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188516 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/R600/R600ControlFlowFinalizer.cpp
lib/Target/R600/R600Defines.h
lib/Target/R600/R600InstrFormats.td
lib/Target/R600/R600InstrInfo.cpp
lib/Target/R600/R600InstrInfo.h
lib/Target/R600/R600Instructions.td