Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
[oota-llvm.git] / lib / CodeGen / ScheduleDAGInstrs.cpp
2011-06-29 Evan ChengSink SubtargetFeature and TargetInstrItineraries (renam...
2011-06-28 Evan Cheng- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
2011-06-02 Devang PatelRemove dead code.
2011-06-02 Devang PatelUpdate DBG_VALUEs while breaking anti dependencies.
2011-06-02 Devang PatelDuring post RA scheduling, do not try to chase reg...
2011-05-06 Andrew TrickAdded an assertion, and updated a comment.
2011-05-05 Andrew TrickARM post RA scheduler compile time fix.
2011-05-05 Andrew Trickwhitespace
2011-04-15 Chris LattnerFix a ton of comment typos found by codespell. Patch by
2011-01-07 Evan ChengDo not model all INLINEASM instructions as having unmod...
2010-12-15 Dan GohmanMove Value::getUnderlyingObject to be a standalone
2010-11-03 Evan ChengTwo sets of changes. Sorry they are intermingled.
2010-10-27 Evan ChengPutting r117193 back except for the compile time cost...
2010-10-25 Evan ChengNeuter r117193 as it causes significant post-ra schedul...
2010-10-23 Evan ChengProperly model the latency of register defs which are...
2010-10-08 Evan ChengAvoid compiler warning: comparison between signed and...
2010-10-08 Evan ChengFix operand latency computation in cases where the...
2010-10-06 Nick LewyckyRemove unused variables.
2010-10-06 Evan Cheng- Add TargetInstrInfo::getOperandLatency() to compute...
2010-09-29 Evan ChengModel Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC...
2010-09-10 Evan ChengTeach if-converter to be more careful with predicating...
2010-07-24 Bob WilsonChange ScheduleDAGInstrs::Defs and ::Uses to be variabl...
2010-07-15 Bill WendlingUse std::vector instead of TargetRegisterInfo::FirstVir...
2010-05-19 Jim GrosbachFix the post-RA instruction scheduler to handle instruc...
2010-05-01 Dan GohmanGet rid of the EdgeMapping map. Instead, just check...
2010-04-17 Dan GohmanFix -Wcast-qual warnings.
2010-03-22 Evan ChengReduce indentation.
2010-03-22 Evan Cheng80 col violation.
2010-03-10 Dale JohannesenProgress towards shepherding debug info through Selecti...
2010-02-16 Duncan SandsThere are two ways of checking for a given type, for...
2009-11-09 David GoodwinFix dependencies added to model memory aliasing for...
2009-11-05 David GoodwinCorrectly add chain dependencies around calls and unkno...
2009-11-03 David Goodwin<rdar://problem/7352605>. When building schedule graph...
2009-11-02 David GoodwinChain dependencies used to enforce memory order should...
2009-10-26 Dan GohmanWhen checking whether a def of an aliased register...
2009-10-18 Evan ChengSpill slots cannot alias.
2009-10-18 Evan Cheng-Revert parts of 84326 and 84411. Distinquishing betwee...
2009-10-09 Dan GohmanFactor out LiveIntervalAnalysis' code to determine...
2009-10-07 Dan GohmanReplace TargetInstrInfo::isInvariantLoad and its target...
2009-09-25 Dan GohmanImprove MachineMemOperand handling.
2009-09-18 Evan ChengEnhance EmitInstrWithCustomInserter() so target can...
2009-08-19 David GoodwinUse the schedule itinerary operand use/def cycle inform...
2009-08-13 David GoodwinAdd callback to allow target to adjust latency of sched...
2009-08-10 David GoodwinPost RA scheduler changes. Introduce a hazard recognize...
2009-08-07 Dan GohmanFix a typo in a comment.
2009-07-17 Dan GohmanEliminate yet another copy of getOpcode.
2009-07-13 Dan GohmanMove isLCSSAForm, isLoopInvariant, getCanonicalInductio...
2009-02-11 Dan GohmanWhen scheduling a block in parts, keep track of the...
2009-02-10 Dan GohmanFactor out more code for computing register live-range...
2009-02-06 Dan GohmanMove ScheduleDAGInstrs.h to be a private header. Front...
2009-01-30 Dan GohmanFix a post-RA scheduling dependency bug.
2009-01-16 Dan GohmanInstead of adding dependence edges between terminator...
2009-01-15 Dan GohmanMove a few containers out of ScheduleDAGInstrs::BuildSc...
2008-12-23 Dan GohmanClean up the atomic opcodes in SelectionDAG.
2008-12-23 Dan GohmanRename BuildSchedUnits to BuildSchedGraph, and refactor the
2008-12-23 Dan GohmanUse isTerminator() instead of isBranch()||isReturn...
2008-12-16 Dan GohmanAdd initial support for back-scheduling address computa...
2008-12-16 Dan GohmanFix some register-alias-related bugs in the post-RA...
2008-12-16 Dan GohmanAdd a simple target-independent heuristic to allow...
2008-12-09 Dan GohmanRewrite the SDep class, and simplify some of the relate...
2008-12-08 Dan GohmanFix the top-level comments, and fix some 80-column...
2008-12-04 Dan GohmanAdd minimal support for disambiguating memory reference...
2008-11-24 Dan GohmanPass the isAntiDep argument.
2008-11-21 Dan GohmanCorrectly set the isCtrl flag for chain dependencies.
2008-11-21 Dan GohmanUpdate comments.
2008-11-21 Dan GohmanSet the isAntiDep flag in the MachineInstr scheduler.
2008-11-21 Dan GohmanUse ComputeLatency in the MachineInstr scheduler.
2008-11-21 Dan GohmanImplement ComputeLatency for MachineInstr ScheduleDAGs...
2008-11-20 Dan GohmanTreat mid-block labels the same as terminators when...
2008-11-19 Dan GohmanExperimental post-pass scheduling support. Post-pass...