Improve MachineMemOperand handling.
authorDan Gohman <gohman@apple.com>
Fri, 25 Sep 2009 20:36:54 +0000 (20:36 +0000)
committerDan Gohman <gohman@apple.com>
Fri, 25 Sep 2009 20:36:54 +0000 (20:36 +0000)
commitc76909abfec876c6b751d693ebd3df07df686aa0
treebc66c4b4bc5955aa33a7c6fb19c0163ef070b08a
parent602b0c8c17f458d2c80f2deb3c8e554d516ee316
Improve MachineMemOperand handling.
 - Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions.
   This eliminates MachineInstr's std::list member and allows the data to be
   created by isel and live for the remainder of codegen, avoiding a lot of
   copying and unnecessary translation. This also shrinks MemSDNode.
 - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated
   fields for MachineMemOperands.
 - Change MemSDNode to have a MachineMemOperand member instead of its own
   fields with the same information. This introduces some redundancy, but
   it's more consistent with what MachineInstr will eventually want.
 - Ignore alignment when searching for redundant loads for CSE, but remember
   the greatest alignment.

Target-specific code which previously used MemOperandSDNodes with generic
SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range
so that the SelectionDAG framework knows that MachineMemOperand information
is available.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82794 91177308-0d34-0410-b5e6-96231b3b80d8
30 files changed:
include/llvm/CodeGen/MachineFunction.h
include/llvm/CodeGen/MachineInstr.h
include/llvm/CodeGen/MachineInstrBuilder.h
include/llvm/CodeGen/MachineMemOperand.h
include/llvm/CodeGen/ScheduleDAG.h
include/llvm/CodeGen/SelectionDAG.h
include/llvm/CodeGen/SelectionDAGNodes.h
lib/CodeGen/LiveIntervalAnalysis.cpp
lib/CodeGen/MachineFunction.cpp
lib/CodeGen/MachineInstr.cpp
lib/CodeGen/ScheduleDAGEmit.cpp
lib/CodeGen/ScheduleDAGInstrs.cpp
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
lib/CodeGen/StackSlotColoring.cpp
lib/CodeGen/TargetInstrInfoImpl.cpp
lib/Target/ARM/ARMLoadStoreOptimizer.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/PowerPC/PPCInstrInfo.td
lib/Target/SystemZ/SystemZInstrBuilder.h
lib/Target/X86/X86ISelDAGToDAG.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
lib/Target/X86/X86InstrBuilder.h
lib/Target/X86/X86InstrInfo.cpp
test/CodeGen/ARM/2008-11-19-ScavengerAssert.ll
utils/TableGen/DAGISelEmitter.cpp