SawStore = true;
return false;
}
- if (TID->isReturn() || TID->isBranch() || TID->hasUnmodeledSideEffects())
+ if (TID->isTerminator() || TID->hasUnmodeledSideEffects())
return false;
// See if this instruction does a load. If so, we have to guarantee that the
const TargetInstrDesc &TID = I.getDesc();
// Ignore stuff that we obviously can't hoist.
- if (TID.mayStore() || TID.isCall() || TID.isReturn() || TID.isBranch() ||
+ if (TID.mayStore() || TID.isCall() || TID.isTerminator() ||
TID.hasUnmodeledSideEffects())
return false;
// after stack slots are lowered to actual addresses.
// TODO: Use an AliasAnalysis and do real alias-analysis queries, and
// produce more precise dependence information.
- if (TID.isCall() || TID.isReturn() || TID.isBranch() ||
- TID.hasUnmodeledSideEffects()) {
+ if (TID.isCall() || TID.isTerminator() || TID.hasUnmodeledSideEffects()) {
new_chain:
// This is the conservative case. Add dependencies on all memory
// references.
// See if it is known to just have a single memory reference.
MachineInstr *ChainMI = Chain->getInstr();
const TargetInstrDesc &ChainTID = ChainMI->getDesc();
- if (!ChainTID.isCall() && !ChainTID.isReturn() && !ChainTID.isBranch() &&
+ if (!ChainTID.isCall() && !ChainTID.isTerminator() &&
!ChainTID.hasUnmodeledSideEffects() &&
ChainMI->hasOneMemOperand() &&
!ChainMI->memoperands_begin()->isVolatile() &&