Caesar Wang [Fri, 22 Apr 2016 10:02:54 +0000 (18:02 +0800)]
UPSTREAM: arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
In order to be standard to manage for rockchip SoCs, move the thermal
data into rk3368 dtsi, we needn't to add a new file for thermal.
Change-Id: I4cadb8742fb103f5642a8d122ebb5970eb140d30
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
6ddf93e05e67f81b6a95840c35e1aa6e042196a8)
Andreas Färber [Wed, 16 Mar 2016 13:58:41 +0000 (14:58 +0100)]
UPSTREAM: Documentation: devicetree: rockchip: Document rk3368-GeekBox
Use "geekbuying,geekbox" compatible string.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
40ac568d0ef07b60ba8cc0f2e88ccdd4dd0e176a)
Change-Id: Ib73b858a68753f77fe60cf4afea51151590e4585
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Andreas Färber [Wed, 16 Mar 2016 13:58:42 +0000 (14:58 +0100)]
UPSTREAM: arm64: dts: rockchip: Add rk3368 GeekBox dts
The GeekBox contains an MXM3 module with a Rockchip RK3368 SoC.
Some connectors are available directly on the module.
This adds initial support, namely serial, USB, GMAC, eMMC, IR and TSADC.
Change-Id: Ic9956b3b935467e3492bdab274579d4cd038d4e6
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
fd7b980c9e1e52d41589c41ae166b0cfae32b210)
Caesar Wang [Tue, 27 Oct 2015 07:31:46 +0000 (15:31 +0800)]
UPSTREAM: arm64: dts: rockchip: Add rk3368 mailbox device nodes
This adds mailbox device nodes in dts.
Mailbox is used by the Rockchip CPU cores to communicate
requests to MCU processor.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
6e7f9f5ad552327fcc1151e2dca141075f3e160a)
Change-Id: I9b93b2b3c28ca686c297d839077df5d725436f2f
Caesar Wang [Mon, 15 Feb 2016 03:30:58 +0000 (11:30 +0800)]
UPSTREAM: arm64: dts: rockchip: fix the incorrect otp-out pin on rk3368
This patch fixes the incorrect Over-temperature protection pin.
since the rk3368 io list said the otp pin is gpio0a3.
Anyway, that should be fixed in here.
Change-Id: I0b868b6a2e1aac3eea21d6de4787b169a53ade5e
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
04317584ff1ad6977ba37acf38d2c6b841ce20a4)
Shawn Lin [Mon, 25 Jan 2016 07:33:43 +0000 (15:33 +0800)]
UPSTREAM: arm64: dts: rockchip: add rk3368 tuning clk for emmc and sdmmc
Add tuning clk for emmc and sdmmc, otherwise I get
the following failure while enabling mmc-hs200-1_8v.
dwmmc_rockchip
ff0f0000.dwmmc: Tuning clock (sample_clk) not defined.
mmc0: tuning execution failed
mmc0: error -5 whilst initialising MMC card
With it
dwmmc_rockchip
ff0f0000.dwmmc: Successfully tuned phase to 170
mmc0: new HS200 MMC card at address 0001
mmcblk0: mmc0:0001 M8G1GC 7.28 GiB
Change-Id: I14534f43249edecbb8239f4a86c808ebb7f0a959
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
90191625ec0d075ac0748181ae1b947b0b30297e)
Shawn Lin [Thu, 21 Jan 2016 12:32:09 +0000 (20:32 +0800)]
UPSTREAM: dt-bindings: rockchip-dw-mshc: add RK3368 dw-mshc description
rk3368 dtsi file add dw-mshc compatible "rockchip,rk3368-dw-mshc"
but didn't add it into rockchip-dw-mshc.txt.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
b662f6d03aeeb20c0f795f469341778f4577a6bf)
Change-Id: I2e97ad3a8701ab2391e421248595092b9a22569d
Caesar Wang [Fri, 25 Sep 2015 02:14:58 +0000 (10:14 +0800)]
UPSTREAM: arm64: dts: rockchip: Add the broadcast-timer for RK3368 SoC
There is a need of a broadcast timer in this case to ensure proper
wakeup when the cpus are in sleep mode and a timer expires.
Change-Id: I8ab0e5506420e2650acc1dac4d5667f40c0d3b4f
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
b8084e5b34e83875846053bf9cd951b7640e40fe)
Matthias Brugger [Fri, 11 Dec 2015 13:22:19 +0000 (14:22 +0100)]
UPSTREAM: arm64: dts: rockchip: Fix typo in rk3368 sdmmc card detect pin name
The card detect pin is currently called sdmcc-cd.
This patch fixes the typo and renames the pin to sdmmc-cd.
Change-Id: I47ac2767ea442764bf71411ebd66de56e9c1e934
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
8fc5abd40efadf57ca43189c9c14c4de3db6300e)
Caesar Wang [Wed, 2 Dec 2015 11:12:20 +0000 (19:12 +0800)]
UPSTREAM: arm64: dts: rockchip: correct voltage range for rk3368-evb-act8846 board
In general, the logic voltage is affected by ddr frequency factors.
We should fix the correct voltage range since assuemd that we have the
ddr frequency driver in mainline.
AFAIK, the 1.8v voltage is used by the SD3.0 card.
Change-Id: Id0ae87c7ec6d3d757fdde0b85caf1f535d200222
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
87ac9de3b44fd6dc8d95a59e67b086c3e57285f8)
Caesar Wang [Tue, 1 Dec 2015 09:13:25 +0000 (17:13 +0800)]
UPSTREAM: arm64: dts: rockchip: add rk3368 evaluation board
This board is similar with the rk3288 evb board but the rk3368 top
board. There exist the act8846 as the pmic.
Moment, add the balight/thermal/emmc/usb.. stuff,
Let the board can happy work.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
5378e28c9776fbab6065cfb54417acff3ea5f1fd)
Change-Id: I78f39fa080d221e06849285b6a0c52bc04d5d1a9
Caesar Wang [Mon, 9 Nov 2015 04:49:01 +0000 (12:49 +0800)]
UPSTREAM: arm64: dts: rockchip: Add main thermal info to rk3368.dtsi
This patch add the thermal needed info on RK3368.
Meanwhile, support the trips to throttle for thermal.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit
f990238f859e95841ecd151da258ea999555f609)
Change-Id: I76ba5230b1a334562ce7607aa02fec445612070c
Heiko Stuebner [Sat, 7 Nov 2015 21:39:26 +0000 (22:39 +0100)]
UPSTREAM: arm64: dts: rockchip: Setup rk3368 ethernet0 alias for u-boot
Add an ethernet0 alias for the RK3368 mac interface so
that u-boot can find the device-node and fill in the mac address on
boards that support a wired network interface.
Change-Id: I2f82939290a0807ed84a3e93f6b0eef879cce076
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
(cherry picked from commit
ff08868ef0154cef01d3a50ae1f19dc968fc95f3)
Mark Yao [Tue, 28 Feb 2017 02:43:50 +0000 (10:43 +0800)]
drm: export drm_get_connector_name to fix compile problem
Fix compile error:
ERROR: "drm_get_connector_name" [drivers/gpu/drm/rockchip/rockchipdrm.ko] undefined!
Change-Id: If1ad322319bf4c20fa6b56be62024472a8272431
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Axel Lin [Fri, 21 Oct 2016 02:30:16 +0000 (10:30 +0800)]
UPSTREAM: regulator: rk808: Use rdev_get_id() to access id of regulator
RK808_ID_DCDC1 is 0, no need to do subtract RK808_ID_DCDC1.
Change-Id: I395c30866aeb5c4c285dd083109a70bfef24bfca
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit
bf8e27621effb49da525fb92a1f192db685d39bd)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Wadim Egorov [Mon, 29 Aug 2016 11:07:59 +0000 (13:07 +0200)]
UPSTREAM: regulator: rk808: Add regulator driver for RK818
Add support for the rk818 regulator. The regulator module consists
of 4 DCDCs, 9 LDOs, 1 switch and 1 BOOST converter which is used to
power OTG and HDMI5V.
The output voltages are configurable and are meant to supply power
to the main processor and other components.
Change-Id: I129a1f22c65684615e9ae792efaa880555f0235e
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
(cherry picked from commit
11375293530bb8434946c8c043f1adf5ffb6be10)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Markus Elfring [Mon, 15 Aug 2016 08:30:31 +0000 (10:30 +0200)]
UPSTREAM: regulator: rk808: Delete owner assignment
The field "owner" is set by core. Thus delete an extra initialisation.
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Mark Brown <broonie@kernel.org>
Change-Id: I7a2e347e07943c7eb5b2c9cae4eae2358a613e0e
(cherry picked from commit
556ae220ac64b6564be8d76d855e26b65fcf75bf)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Wadim Egorov [Tue, 10 May 2016 13:18:55 +0000 (15:18 +0200)]
UPSTREAM: regulator: rk808: Migrate to regulator core's simplified DT parsing code
A common simplified DT parsing code for regulators was introduced in
commit
a0c7b164ad11 ("regulator: of: Provide simplified DT parsing
method")
While at it also added RK8XX_DESC and RK8XX_DESC_SWITCH macros for the
regulator_desc struct initialization. This just makes the driver more compact.
Change-Id: I5c1211decf37d27a68167be9b6354834532cc87b
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit
9e9daa0a67d59df432664cdca1cf4659057fd00c)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Wadim Egorov [Tue, 26 Apr 2016 14:54:04 +0000 (16:54 +0200)]
UPSTREAM: regulator: rk808: Add rk808_reg_ops_ranges for LDO3
LDO_REG3 descriptor is using linear_ranges.
Add and use proper ops for LDO_REG3.
Change-Id: Iad515fd23e7b3bca6248739a54335a71eed01238
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit
129d7cf98f5c739014ae5aa0311e48f6a64b0758)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Arnd Bergmann [Tue, 26 Apr 2016 09:19:26 +0000 (11:19 +0200)]
UPSTREAM: regulator: rk808: remove unused rk808_reg_ops_ranges
After removing all uses of the range operations in a recent patch,
we get a warning about the symbol not being referenced anywhere:
drivers/regulator/rk808-regulator.c:306:29: 'rk808_reg_ops_ranges' defined but not used
This removes the now-unused structure along with the
rk808_set_suspend_voltage_range function that is only referenced from
rk808_reg_ops_ranges.
Fixes: afcd666d9db0 ("regulator: rk808: remove linear range definitions with a single range")
Change-Id: I565c91186ab5d7457a62b3bc4b4896a08f39dd2e
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit
4a5ed8c1adc39f86a2887183c71b007bc962fdce)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Wadim Egorov [Mon, 25 Apr 2016 13:20:43 +0000 (15:20 +0200)]
UPSTREAM: regulator: rk808: remove linear range definitions with a single range
The driver was using only linear ranges. Now we remove linear range
definitions with a single range. So we have to add an ops struct for
ranges and adjust all other ops functions accordingly.
Change-Id: I6b2dd5e035832f9460ec8a24b5214204f7a930b7
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
(cherry picked from commit
afcd666d9db0ebfbf2751cce1e07b548547ca82e)
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Huang, Tao [Mon, 27 Feb 2017 13:02:17 +0000 (21:02 +0800)]
arm64: dts: rockchip: add dts file for rk3399-evb-rev3-android
Change-Id: I63306691f6b99243bec6289acda7abe303c70266
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 27 Feb 2017 12:51:48 +0000 (20:51 +0800)]
arm64: dts: rockchip: cleanup rk3399-android.dtsi
default enable rkvdec and vpu.
rga is default on, remove duplicate configuration.
Change-Id: I8375b2202a81977238e8120e1c2d60f2130844b5
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Nickey Yang [Mon, 13 Feb 2017 07:40:29 +0000 (15:40 +0800)]
drm/rockchip: dw_hdmi: add default 594Mhz clk for 4K@60hz
add 594Mhz configuration parameters in rockchip_phy_config
Change-Id: Iaa335cdd90059817fd9892877e574f8b84f2b5dc
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Nickey Yang [Wed, 19 Oct 2016 11:00:09 +0000 (19:00 +0800)]
drm/edid: Add 3840x2160@60hz modes
Add 3840x2160@60hz modes in edid_4k_modes[] array.
Change-Id: I6d14cecebb68ccfaf4e92109a44bde0eb132f73b
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Nickey Yang [Mon, 17 Oct 2016 06:58:31 +0000 (14:58 +0800)]
FROMLIST: drm: edid: HDMI 2.0 HF-VSDB block parsing
Adds parsing for HDMI 2.0 'HDMI Forum Vendor
Specific Data Block'. This block is present in
some HDMI 2.0 EDID's and gives information about
scrambling support, SCDC, 3D Views, and others.
Parsed parameters are stored in drm_connector
structure.
(am from: https://patchwork.kernel.org/patch/
9273645)
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Change-Id: I5a1485b79a407fd27ac4754827de318175bb8f6a
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Nickey Yang [Fri, 10 Feb 2017 09:30:03 +0000 (17:30 +0800)]
FROMLIST: drm: Add SCDC helpers
SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devices to communicate.
This commit introduces helpers to access the SCDC and provides the
symbolic names for the various registers defined in the specification.
(am from: https://patchwork.kernel.org/patch/
7258251/)
Change-Id: I378bc2b465a720ccfede35a93bce0d9371e78f78
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
Mark Yao [Mon, 27 Feb 2017 03:22:11 +0000 (11:22 +0800)]
dt-bindings: rockchip: add missing vop document
Change-Id: Idd86084787216bc835d9e3e8cf4e9d04975da68c
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Mon, 19 Dec 2016 09:42:56 +0000 (17:42 +0800)]
ARM64: dts: rk3328: add vop display node
Change-Id: I60322993b782a6d04ca7e46fdc114a0fbc43778a
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Mon, 19 Dec 2016 09:32:46 +0000 (17:32 +0800)]
drm/rockchip: support rk3328 vop
Change-Id: Ic8c1073a22b62fc9a1b2e758429298538727c20e
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Sun, 5 Feb 2017 06:32:54 +0000 (14:32 +0800)]
drm/rockchip: vop: get rid of max_output_fb
max_output_fb is similar to max_display_output
Change-Id: I2045dd1ca5f7c99d723122d1b6c9dbf600db9c61
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 24 Feb 2017 08:58:32 +0000 (16:58 +0800)]
drm/rockchip: vop: improve and add more info to vop sysfs
cat /sys/kernel/debug/dri/0/summary:
VOP [
ff900000.vop]: ACTIVE
Connector: DSI
bus_format[0] output_mode[0]
Display mode: 1200x1920p60
clk[159390] real_clk[159390] type[8] flag[a]
H: 1200 1280 1281 1341
V: 1920 1955 1956 1981
win0-0: DISABLED
win1-0: DISABLED
win2-0: ACTIVE
format: XB24 little-endian (0x34324258)
zpos: 0
src: pos[0x0] rect[1200x1920]
dst: pos[0x0] rect[1200x1920]
buf[0]: addr: 0x0000000002d3a000 pitch: 4800 offset: 0
win2-0: DISABLED
win2-1: DISABLED
win2-2: DISABLED
win3-0: DISABLED
win3-0: DISABLED
win3-1: DISABLED
win3-2: DISABLED
VOP [
ff8f0000.vop]: DISABLED
Change-Id: I7811b2411bd9d2d52059d15645de399b0de5a49b
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 24 Feb 2017 08:57:54 +0000 (16:57 +0800)]
drm: support drm_get_connector_name
Change-Id: I075d948afc2baa47fb147f9a967844a872171397
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Rocky Hao [Fri, 24 Feb 2017 07:03:34 +0000 (15:03 +0800)]
arm64: dts: rockchip: add cpu's power coefficient for rk3328
Change-Id: I33112b21b8f92482ba8e337d622e51948ec923a0
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Rocky Hao [Fri, 24 Feb 2017 06:55:04 +0000 (14:55 +0800)]
arm64: dts: rockchip: add tsadc and thermal basic config for rk3328
Change-Id: Ic0d417093c54fea5948fd79cab276ebe7aea0f2e
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Rocky Hao [Fri, 24 Feb 2017 06:51:53 +0000 (14:51 +0800)]
thermal: rockchip: add rk3328 support
Change-Id: I31f87741a874657fb7caf494ebafd53b6c0ef3b1
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Rocky Hao [Fri, 24 Feb 2017 03:00:32 +0000 (11:00 +0800)]
arm64: dts: rockchip: complete cpufreq config data for rk3328
Change-Id: I422ec388ab6d66e1ba669028d7b88525569e88d5
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
Zheng Yang [Fri, 24 Feb 2017 06:56:40 +0000 (14:56 +0800)]
drm/rockchip: dw_hdmi: use crtc_clock as vpll clock rate
adjusted_mode.crtc_clock is the real pixel clock rate.
Change-Id: Iac242b89e3144bc53c40170c2cec0c0913ef6ee0
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Zheng Yang [Fri, 24 Feb 2017 06:53:32 +0000 (14:53 +0800)]
drm: bridge/dw_hdmi: support DRM_MODE_FLAG_DBLCLK
Change-Id: I66d9456d6bde38fcf17d5cd5f6394517e4308a68
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
Mark Yao [Fri, 24 Feb 2017 02:56:43 +0000 (10:56 +0800)]
drm/rockchip: vop: support DRM_MODE_FLAG_DBLCLK
Change-Id: I604e6ba32a2ac3a6569d341d23f9a3368f921120
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
chenjh [Fri, 24 Feb 2017 06:35:56 +0000 (14:35 +0800)]
mfd: rk805: fix submodules node available match error
include: rtc, gpio, pwrkey
Change-Id: I3c91e2ade911017125c80008c122f4bf484767f3
Signed-off-by: chenjh <chenjh@rock-chips.com>
Zhangbin Tong [Fri, 24 Feb 2017 01:49:39 +0000 (09:49 +0800)]
arm64: dts: rockchip: Add RK3399 Excavator box dts for drm
Change-Id: Ie3c9cadb3cfbd9d4080ff54c0b65933f347e093a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
Mark Yao [Fri, 24 Feb 2017 02:27:18 +0000 (10:27 +0800)]
arm64: dts: rockchip: clk: rk3399: support dual pll for drm linux
Change-Id: Ifb38159915939731c3cfc83c7e71000281997cf3
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Fri, 24 Feb 2017 02:19:27 +0000 (10:19 +0800)]
drm: print framebuffer size when plane check fail
Change-Id: Id51f25e407953cf123444cf961da8a0f8f5745e8
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Jacob Chen [Wed, 22 Feb 2017 09:42:48 +0000 (17:42 +0800)]
arm64: configs: enable network filesystem for rockchip linux
NFS is a important feature and should be enabled.
Change-Id: Ibc3794bd31f9ddad94af7d3c06d5569fe6feeaf8
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Jacob Chen [Wed, 22 Feb 2017 09:43:35 +0000 (17:43 +0800)]
ARM: configs: enable network filesystem for rockchip linux
NFS is a important feature and should be enabled.
Change-Id: If38086293c47e038fa605a013786465a466f107a
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
William Wu [Wed, 22 Feb 2017 09:41:59 +0000 (17:41 +0800)]
arm64: rockchip_linux_defconfig: enable USB_CONFIGFS_ACM
Change-Id: I70555f8a3897540092068393fea62308fc5e098c
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Wed, 22 Feb 2017 09:38:55 +0000 (17:38 +0800)]
arm64: rockchip_defconfig: enable USB_CONFIGFS_MASS_STORAGE
Change-Id: Idb0d19f2ccad9026f3078724cffbd44b67c5d043
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Wed, 22 Feb 2017 09:33:44 +0000 (17:33 +0800)]
arm64: rockchip_defconfig: enable USB_CONFIGFS_ACM
Change-Id: I4abe4b08d9dde1e873221431af680298269ddfa5
Signed-off-by: William Wu <wulf@rock-chips.com>
Jacob Chen [Wed, 22 Feb 2017 08:22:11 +0000 (16:22 +0800)]
ARM: rockchip_linux_defconfig: enable MASS_STORAGE config
Change-Id: Ib23f4c7c6d302203fcb759e93efc4601ca1a13bd
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Bin Yang [Wed, 22 Feb 2017 06:05:10 +0000 (14:05 +0800)]
drm/rockchip: cdn-dp: modify switchdev name to "cdn-dp"
If DP and HDMI are enabled at the same board, they will be
register switchdev with the same name in the same directory.
This would cause register switchdev fail.
Resulting in the following error:
[ 0.882415] [<
ffffff8008212044>] sysfs_warn_dup+0x60/0x7c
[ 0.882424] [<
ffffff800821212c>] sysfs_create_dir_ns+0x74/0x94
[ 0.882436] [<
ffffff8008359fc0>] kobject_add_internal+0xc8/0x290
[ 0.882446] [<
ffffff800835a428>] kobject_add+0xe0/0x10c
[ 0.882454] [<
ffffff80084c2874>] device_add+0xec/0x508
[ 0.882462] [<
ffffff80084c2e3c>] device_create_groups_vargs+0xb4/0xf8
[ 0.882471] [<
ffffff80084c2eac>] device_create_vargs+0x2c/0x34
[ 0.882479] [<
ffffff80084c2f14>] device_create+0x60/0x80
[ 0.882491] [<
ffffff80087248bc>] switch_dev_register+0x8c/0x120
[ 0.882502] [<
ffffff80084709ec>] cdn_dp_bind+0x4c4/0x644
[ 0.882511] [<
ffffff80084c091c>] component_bind_all+0x94/0x1c0
[ 0.882523] [<
ffffff8008478550>] rockchip_drm_bind+0x1c4/0xb54
[ 0.882533] [<
ffffff80084c0554>] try_to_bring_up_master.part.3+0xac/0x114
[ 0.882542] [<
ffffff80084c0780>] component_add+0x88/0xf8
[ 0.882550] [<
ffffff8008470504>] cdn_dp_probe+0x140/0x164
[ 0.882559] [<
ffffff80084c71f8>] platform_drv_probe+0x58/0xa4
[ 0.882568] [<
ffffff80084c5498>] driver_probe_device+0x118/0x2ac
[ 0.882576] [<
ffffff80084c5778>] __device_attach_driver+0x88/0x98
[ 0.882584] [<
ffffff80084c38a0>] bus_for_each_drv+0x7c/0xac
[ 0.882592] [<
ffffff80084c52cc>] __device_attach+0xa4/0x124
[ 0.882600] [<
ffffff80084c58e4>] device_initial_probe+0x10/0x18
[ 0.882609] [<
ffffff80084c4924>] bus_probe_device+0x2c/0x8c
[ 0.882617] [<
ffffff80084c4da0>] deferred_probe_work_func+0x74/0xa0
[ 0.882628] [<
ffffff80080b2b38>] process_one_work+0x218/0x3e0
[ 0.882636] [<
ffffff80080b3538>] worker_thread+0x2e8/0x404
[ 0.882644] [<
ffffff80080b7e70>] kthread+0xe8/0xf0
[ 0.882653] [<
ffffff8008082690>] ret_from_fork+0x10/0x40
[ 0.882675] kobject_add_internal failed for hdmi with -EEXIST, don't try to
register things with the same name in the same directory.
Change-Id: I0c1b175a2483d5524d9cc0e5261d332c5ad286c8
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
Sugar Zhang [Tue, 21 Feb 2017 03:14:05 +0000 (11:14 +0800)]
ASoC: rockchip: i2s: add a delay before i2s clear
in order to keep i2s lrck signal integrity, when i2s stop,
need at least one lrck cycle to ensure signal integrity.
the max delay time is when lrck is 8khz, the delay time is
125us(1/8khz), using udelay(150) with a 25us margin.
Change-Id: Ia0b0c8b0153e25ed3686eee2e13f370d0c3da380
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Binyuan Lan [Mon, 20 Feb 2017 08:50:55 +0000 (16:50 +0800)]
arm64: rockchip_linux_defconfig: enable MASS_STORAGE config
Change-Id: Ibe549b102632e6c19c508f46df1b4d4a2b518d51
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
Mark Yao [Fri, 17 Feb 2017 11:49:08 +0000 (19:49 +0800)]
drm/rockchip: support cpu cache for drm memory
Change-Id: Ic9ca3d0862eb8c5c4d8a002db8cbbcc93d2dcc02
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Zhou weixin [Wed, 22 Feb 2017 02:54:56 +0000 (10:54 +0800)]
ARM64: dts: rk3399-tve1205g: set fixed clock timing of panel
Change-Id: I1872ddc5d386b6707ec9ac4e1843b8346a5b36e7
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
Mark Yao [Tue, 21 Feb 2017 01:50:07 +0000 (09:50 +0800)]
drm/rockchip: fixup input source check
check destination with max_input is wrong.
Change-Id: If5499b0bc61c84f2b91b641b1974b29b6c042215
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Mark Yao [Tue, 21 Feb 2017 01:04:04 +0000 (09:04 +0800)]
rockchip: clk: rk3399: default enable dual pll for vop
Change-Id: I88a2a549eaafa91e4159f262a5f5838c834a89e9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
Elaine Zhang [Tue, 21 Feb 2017 08:50:51 +0000 (16:50 +0800)]
clk: rockchip: add pll_wait_lock for pll_enable
if pll is power down,when power up pll need wait pll lock.
Change-Id: I2e795a682a0c9712b41e00ddf054065dde4a5c7c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
William Wu [Tue, 21 Feb 2017 12:57:52 +0000 (20:57 +0800)]
phy: rockchip-inno-usb3: support u3 to work on u2 only mode
Current code set usb2.0 only mode by type in command and may be
failed if change to usb3.0 for that we need reset the controller
when change mode. This patch add a node in debug file system for
config usb2.0 only or usb2.0/usb3.0 mode. So SLT testing or anyone
else can use this node to change config mode.
1. Config to usb2.0/usb3.0 mode:
echo u3 > /sys/kernel/debug/<phy name>/u3phy_mode
2. Config to usb2.0 only mode:
echo u2 > /sys/kernel/debug/<phy name>/u3phy_mode
Change-Id: I11338d8307e771b7d76b61a91477d353444c011c
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 12:24:36 +0000 (20:24 +0800)]
arm64: dts: rockchip: add grf handle for rk3328 u3phy
The USB 3.0 PHY need to config grf when change between
USB 2.0 only and USB 2.0/3.0 mode, so we add grf property
for u3phy node.
Change-Id: I4ff2670d0637e9d0cbae06f5e9efbde9a8513bb3
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 12:16:33 +0000 (20:16 +0800)]
usb: dwc3: rockchip-inno: support to set testmodes via debugfs
This patch create host_testmode file in debugfs for
USB HOST. It's useful for us to use a scope to verify
signal integrity for USB2/USB3 HOST.
For example, set testmodes for rk3328 board USB:
1. set test packet for the USB2 port of USB3 interface:
echo test_packet > /sys/kernel/debug/usb.23/host_testmode
2. set compliance mode for the USB3 port of USB3 interface:
echo test_u3 > /sys/kernel/debug/usb.23/host_testmode
3. check the testmode status:
cat /sys/kernel/debug/usb.23/host_testmode
The log maybe like this:
U2: test_packet /* means that U2 in test mode */
U3: compliance mode /* means that U3 in test mode */
Change-Id: I6ddead14a7b78a011bbffcec6bf865df0632fe1b
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 12:00:51 +0000 (20:00 +0800)]
phy: rockchip-inno-usb3: add phy_cp_test function for u3phy
The Inno USB3 PHY disable the ability to toggle the CP test
pattern by default. But when do do USB3 compliance test, it
need to change the CP test pattern according to the requirement
of oscilloscope.
This patch add phy_cp_test function to enable the USB3 PHY
to detect the negative pulse which from the Aux Out of the
oscilloscope in SSRX+, and then the USB3 PHY can toggle the
CP test pattern while do USB3 compliance test.
Change-Id: Idbdf937a7a032dcedfd5f207b2d6d5961ed27b15
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 11:43:02 +0000 (19:43 +0800)]
phy: add cp_test callback
There are several SoCs (e.g. rk3228h and rk3328) that integrated
with Inno USB3 PHY, they can't toggle CP test pattern when do
USB3 compliance test by default.
This patch add a cp_test callback for USB3 controller to enable
the special USB3 PHY to toggle the CP test pattern.
Change-Id: I2d603202723a4c044d4231af10cfe2c60ec0e988
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 09:37:58 +0000 (17:37 +0800)]
usb: host: xhci-plat: get the usb3 phy for shared_hcd
This patch tries to get the USB3 PHY using, and associates
the XHCI shared_hcd device with it.
With this patch, the USB HUB core driver can do USB PHY
operations base on USB PHY framework, e.g. call usb_phy_
notify_connect() or usb_phy_notify_disconnect() to notify
USB PHY driver to do soft connect or soft disconnect.
Change-Id: I3b51181b840a68ae477b764013446f49dbf7ca70
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 09:03:19 +0000 (17:03 +0800)]
arm64: dts: rockchip: add u3 autosuspend quirk for rk3328
This patch adds a quirk to disable rk3328 xHCI controller
USB3 port autosuspend function, and USB2 port autosuspend
function is still enabled.
Change-Id: Ie5e6883811b09a9a0d839ce59d8f9c4ad8ad3378
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 08:58:22 +0000 (16:58 +0800)]
usb: dwc3: add dis_u3_autosuspend_quirk
Some xHCI controllers (e.g. Rockchip rk3328 SoC) integrated
in DWC3 IP, don't support USB 3.0 autosuspend well, so we
need to disable USB 3.0 HUB autosuspend function with a quirk.
Change-Id: I72d93837496f875dbcbb16818aa3690017cc1085
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 08:41:55 +0000 (16:41 +0800)]
usb: host: xhci: set xhci autosuspend quirk based on platform data
Some USB controllers (such as rk3328 SoC DWC3 controller with INNO
USB 3.0 PHY) don't support autosuspend well, when receive remote
wakeup signal from autosuspend, the Port Link State training failed,
the correct PLC is Resume->Recovery->U0, but when the issue happens,
the wrong PLC is Resume->Recovery->Inactive, cause resuming SS port
fail. This issue always occurs when connect with external USB 3.0 HUB.
This patch add a quirk to disable autosuspend function, and add new
'usb3_disable_autosuspend' member in xHCI platform data to support
set the quirk based on platform data.
Change-Id: Ice01d70178206e22658660361dd3a525046cbcf5
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Tue, 21 Feb 2017 08:02:36 +0000 (16:02 +0800)]
usb: core: hub: add quirk for hub with broken autosuspend function
Some USB host controller seems to have problems with
autosuspend. For example, Rockchip rk3328 SoC USB 3.0
wouldn't handle remote wakeup correctly with external
hub after entered autosuspend, caused to resume SS
port fail.
This patch introduces a new quirk flag for hub that
should remain disabled for autosuspend.
Change-Id: I6d14222b2c5025583fea811a6afd6abd22f41cb9
Signed-off-by: William Wu <wulf@rock-chips.com>
huweiguo [Tue, 21 Feb 2017 11:28:20 +0000 (19:28 +0800)]
net: wireless: rockchip_wlan: add rtl8188fu support
update rtl8188eu wifi driver to version v4.3.23.6_20964.
20170110
Change-Id: I8665563259e49bcdb0498b93fac6138c42ffd051
Signed-off-by: huweiguo <hwg@rock-chips.com>
Frank Wang [Fri, 17 Feb 2017 01:34:48 +0000 (09:34 +0800)]
arm64: dts: rockchip: enable otg-port node of usb2-phy for rk3328-evb
This patch enable otg-port node of usb2-phy for dwc2 otg controller
on rk3328-evb board.
Change-Id: Ic6ce4beb2ba1814554e709a7d8af83a9ece9d7c9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Mon, 13 Feb 2017 01:47:39 +0000 (09:47 +0800)]
arm64: dts: rockchip: add otg-port node of usb2-phy for rk3328 dwc2
This patch adds otg-port node of usb2-phy for dwc2 otg controller
on rk3328 SoC.
Change-Id: I4cda3e02d9cab2328cb2a3fe423cd4198258e32b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Frank Wang [Fri, 17 Feb 2017 02:47:49 +0000 (10:47 +0800)]
phy: rockchip-inno-usb2: add otg-port support for rk3328
This patch adds otg-port configuration for rk3328 SoC.
Change-Id: Ic680c7f345396c129e7b2ea8a8dded8ba6ee0ae9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
zhangjun [Mon, 20 Feb 2017 01:38:46 +0000 (09:38 +0800)]
ARM64: dts: rk3399-tve1205g: turn off codec power when suspend
Change-Id: I3c4c841ae576e2c1aa016b915f53384ab167a4eb
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
zhangjun [Mon, 20 Feb 2017 01:06:57 +0000 (09:06 +0800)]
ASoC: Update driver for codec cx2072x
1. codec into bias off mode when secondary standby
2. restore hw registers during a suspend/resume cycle.
(Note: codec power must be closed after suspend)
Change-Id: I530d59c161afa64bb2781bc12228ff3b60debd6f
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
Huang, Tao [Mon, 20 Feb 2017 08:15:13 +0000 (16:15 +0800)]
arm64: dts: rk3399: remove next
Very small clean up.
Change-Id: Ie023404b11cec26bcb9ec5e1e7b7512351acb888
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 20 Feb 2017 07:58:42 +0000 (15:58 +0800)]
arm64: dts: rk3399: rename android-next to android
The md5sum is identical after rename, so this commit is safe.
Change-Id: I97cb5faecebaad9d2e9c39f67f19f662642cc5e8
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Huang, Tao [Mon, 20 Feb 2017 07:49:03 +0000 (15:49 +0800)]
arm64: dts: rk3399: rename android to android-6.0
Except dts of VR.
The md5sum is identical after rename, so this commit is safe.
Change-Id: I9ec324355ae67bbe2bb626090402ae797de13d92
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
Meng Dongyang [Wed, 15 Feb 2017 12:53:36 +0000 (20:53 +0800)]
Documentation: bindings: add otg-vbus-gpios property for Rockchip USB2PHY
Add otg-vbus-gpios optional property to assigned a gpio to
control vbus of otg port.
Change-Id: I257a53edc4d62543f8ac9c7591c29e7231227c20
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Meng Dongyang [Mon, 23 Jan 2017 06:25:57 +0000 (14:25 +0800)]
phy: rockchip-inno-usb2: support to control vbus by gpio
The current code of u2phy set vbus level by set cable state of power
controller, so we can't control vbus level if the platform use gpio
to control vbus. This patch add gpio in u2phy driver and set vbus
level if the mode of usb is detect by u2phy.
Change-Id: I84e966b6e24cb9b6a199fcaad0c509fc003089de
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
zhangjun [Wed, 15 Feb 2017 07:51:15 +0000 (15:51 +0800)]
arm64: dts: rockchip: Add bt sco audio support for rk3399-tve1205g
disable spdif support which is useless meanwhile
Change-Id: Ib116bac82d5d3d13392be2fb62eaf978a08592a0
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
zhangjun [Wed, 15 Feb 2017 07:14:27 +0000 (15:14 +0800)]
arm64: rockchip_defconfig: enable bt sco codec driver
Change-Id: I58d6f5ade04cbfcef436237ae3bc868b6045a9d5
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
chenzhen [Fri, 10 Feb 2017 08:29:15 +0000 (16:29 +0800)]
MALI: midgard: RK: adapt cores_pm in DDK r14 for solution_1_for_glitch
Change-Id: I383779bd39d6ae52f65ad25bf2e0eb0f1a25dd00
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Mon, 17 Oct 2016 11:38:36 +0000 (19:38 +0800)]
MALI: rockchip: upgrade midgard DDK to r14p0-01rel0
Along with a slight modification in mali_kbase_core_linux.c,
for building in rk Linux 4.4:
-#if KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE
+#if KERNEL_VERSION(4, 4, 0) > LINUX_VERSION_CODE
Change-Id: I34565cb975866b46c5e3a4d8e2ac5e350dcceb80
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Fri, 30 Dec 2016 11:56:52 +0000 (19:56 +0800)]
Revert "Revert "MALI: midgard: RK: not to power off all the pm cores""
This reverts commit
d94880b547779baaaa9e9b733c38881cad8aa685.
Change-Id: Iac64d84ff5a7ee3e5666ed2829c17de413fc9bcd
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Fri, 30 Dec 2016 11:56:50 +0000 (19:56 +0800)]
Revert "MALI: midgard: RK: slowdown clk_gpu before poweroff cores"
This reverts commit
89501d8dd3c214e4a162e94804f0d56c61c23237.
Change-Id: I403b63847da10bc2c5536bd26f692bafc849588e
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Fri, 30 Dec 2016 11:56:48 +0000 (19:56 +0800)]
Revert "MALI: midgard: avoid GPU voltage domain keeping the initial voltage"
This reverts commit
57984d531806892a8e14bb7c1b42b1c4c406ddf9.
Change-Id: If538c9bbeb5d3fc7302f9683cb85f8acdd309a09
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
chenzhen [Fri, 30 Dec 2016 11:56:42 +0000 (19:56 +0800)]
Revert "MALI: midgard: support sharing regulator with other devices"
This reverts commit
85b4e1dffa2e7a0bbd092d294043f19f82417d74.
Change-Id: Ie8fb980cb8a8b063dd6c9626d5b6c858b36f0976
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
david.wu [Fri, 20 Jan 2017 08:22:54 +0000 (16:22 +0800)]
arm64: dts: rockchip: add gmac support for rk3328-evb
Change-Id: I05e4eb2d904809a310b12f0de8ae274b90dd583a
Signed-off-by: david.wu <david.wu@rock-chips.com>
david.wu [Fri, 20 Jan 2017 08:20:19 +0000 (16:20 +0800)]
arm64: dts: rockchip: add io-domain support for rk3328-evb
Change-Id: I15fb97655419e723ce001b8900b413dac3e291e8
Signed-off-by: david.wu <david.wu@rock-chips.com>
Luo wei [Fri, 17 Feb 2017 08:10:36 +0000 (16:10 +0800)]
arm64: dts: rockchip: modify auto dp rayken hwrotation for rk3399-box-rev2-disvr dts
Change-Id: Ia5fc077acba519c07f58456fde0257e313181197
Signed-off-by: Luo wei <lw@rock-chips.com>
Elaine Zhang [Fri, 17 Feb 2017 08:36:44 +0000 (16:36 +0800)]
clk: rockchip: rk3328: add SCLK_HDMI_SFC id
Change-Id: Ic876175272cba40093e555ee815e9261bb39d510
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
david.wu [Fri, 20 Jan 2017 08:09:13 +0000 (16:09 +0800)]
arm64: dts: rockchip: add pwm support for rk3328
Change-Id: I20d150fb258f9eb7f09623189551b982b641e7ad
Signed-off-by: david.wu <david.wu@rock-chips.com>
david.wu [Fri, 17 Feb 2017 08:21:19 +0000 (16:21 +0800)]
pwm: rockchip: need the Distinguish between rk3328 and rk3288 for clk used
Change-Id: Ib6274a200640ab8829a99761ffbf60d530fe5653
Signed-off-by: david.wu <david.wu@rock-chips.com>
huweiguo [Fri, 17 Feb 2017 08:20:00 +0000 (16:20 +0800)]
Bluetooth: update rtk_btusb driver to v 4.1.2
Change-Id: I3627b1938c734cfe4ce32c269798037dc1ff8a32
Signed-off-by: huweiguo <hwg@rock-chips.com>
chenjh [Wed, 15 Feb 2017 11:48:03 +0000 (19:48 +0800)]
mfd: rk808: add sysfs debug node "/sys/rk8xx/rk8xx_dbg"
Change-Id: I197dc97b7337414a7d52426da0e0cb8c7480c917
Signed-off-by: chenjh <chenjh@rock-chips.com>
david.wu [Fri, 20 Jan 2017 08:12:04 +0000 (16:12 +0800)]
arm64: dts: rockchip: add gmac support for rk3328
Change-Id: If46e67a05e2a54462b1a83433018385c5f52942c
Signed-off-by: david.wu <david.wu@rock-chips.com>
david.wu [Fri, 20 Jan 2017 08:07:47 +0000 (16:07 +0800)]
arm64: dts: rockchip: change the compatible for rk3328 i2c
Change-Id: I02e7c4088a7a14e233ce2fd907d6a249c18f3a7d
Signed-off-by: david.wu <david.wu@rock-chips.com>
david.wu [Fri, 20 Jan 2017 08:01:49 +0000 (16:01 +0800)]
i2c: rk3x: Don't need to add rk3328 i2c compitiable
Change-Id: I32f9698fcfdce4ecd40b9be7b2ab7ffd82651b9b
Signed-off-by: david.wu <david.wu@rock-chips.com>
William Wu [Wed, 15 Feb 2017 13:34:52 +0000 (21:34 +0800)]
arm64: dts: rockchip: enable usb3 controller for rk3328-evb
Change-Id: I49c152476f6c87195e6b68a9477d84d8bfcc1a70
Signed-off-by: William Wu <wulf@rock-chips.com>
William Wu [Wed, 15 Feb 2017 13:24:23 +0000 (21:24 +0800)]
usb: dwc3: add a new glue layer for rockchip SoCs with INNO PHY
This patch add a rockchip specific glue layer to support
USB 3.0 HOST only mode for rockchip USB 3.0 core wrapper
consisting of USB 3.0 controller IP from Synopsys and USB
3.0 PHY IP from Innosilicon.
With this patch, we can support for XHCI integrated in
DWC3 IP on rockchip platforms. Because some INNO USB 3.0
PHY can't detect disconnection by PHY IP, and cause USB3
device unrecognized when replugged again. So we depend on
the HUB core driver to detect the disconnection, and send
notifier to DWC3 driver from USB PHY driver, then we can
do phy reset and remove/add hcd to reinit HCD.
Change-Id: I6972c6f9f8f7160dbd74ad531b843a65ccec5dc0
Signed-off-by: William Wu <wulf@rock-chips.com>
projects / firefly-linux-kernel-4.4.55.git / log