arm64: dts: rockchip: change the compatible for rk3328 i2c
authordavid.wu <david.wu@rock-chips.com>
Fri, 20 Jan 2017 08:07:47 +0000 (16:07 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 17 Feb 2017 06:38:31 +0000 (14:38 +0800)
Change-Id: I02e7c4088a7a14e233ce2fd907d6a249c18f3a7d
Signed-off-by: david.wu <david.wu@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3328.dtsi

index a06d499a96a8bab384a8d044101f48f102d9bff1..a8b7072d350ee3cb5ad20f25d2b04f022f226252 100644 (file)
        };
 
        i2c0: i2c@ff150000 {
-               compatible = "rockchip,rk3328-i2c";
+               compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
                reg = <0x0 0xff150000 0x0 0x1000>;
                interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
        };
 
        i2c1: i2c@ff160000 {
-               compatible = "rockchip,rk3328-i2c";
+               compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
                reg = <0x0 0xff160000 0x0 0x1000>;
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
        };
 
        i2c2: i2c@ff170000 {
-               compatible = "rockchip,rk3328-i2c";
+               compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
                reg = <0x0 0xff170000 0x0 0x1000>;
                interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
        };
 
        i2c3: i2c@ff180000 {
-               compatible = "rockchip,rk3328-i2c";
+               compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
                reg = <0x0 0xff180000 0x0 0x1000>;
                interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;