Remove doesSectionRequireSymbols.
[oota-llvm.git] / test / MC / Disassembler /
2014-12-30 Craig TopperTestcases for r224939.
2014-12-29 Colin LeMahieu[Hexagon] Adding allocframe, post-increment circular...
2014-12-29 Colin LeMahieu[Hexagon] Adding post-increment register form stores...
2014-12-29 Colin LeMahieu[Hexagon] Replacing the remaining postincrement stores...
2014-12-29 Colin LeMahieu[Hexagon] Renaming old multiclass for removal. Adding...
2014-12-26 Colin LeMahieu[Hexagon] Adding auto-incrementing loads with and witho...
2014-12-26 Colin LeMahieu[Hexagon] Adding locked loads.
2014-12-26 Colin LeMahieu[Hexagon] Adding deallocframe and circular addressing...
2014-12-26 Colin LeMahieu[Hexagon] Adding remaining post-increment instruction...
2014-12-26 Colin LeMahieu[Hexagon] Adding post-increment unsigned byte loads.
2014-12-26 Colin LeMahieu[Hexagon] Adding post-increment signed byte loads with...
2014-12-26 Craig Topper[X86] Add the debug registers DR8-DR15 so we can assemb...
2014-12-26 Craig Topper[X86] Don't fail disassembly if REX.R/REX.B is used...
2014-12-26 Craig TopperTeach disassembler to handle illegal immediates on...
2014-12-23 Colin LeMahieu[Hexagon] Adding doubleword load.
2014-12-23 Colin LeMahieu[Hexagon] Reapplying 224775 load words.
2014-12-23 Jozef Kolek[mips][microMIPS] Implement CACHE, PREF, SSNOP, EHB...
2014-12-23 Colin LeMahieuReverting 224775 until mayLoad flag is addressed.
2014-12-23 Colin LeMahieu[Hexagon] Adding word loads.
2014-12-23 Colin LeMahieu[Hexagon] Adding signed halfword loads.
2014-12-23 Jozef Kolek[mips][microMIPS] Implement LWSP and SWSP instructions
2014-12-22 Colin LeMahieu[Hexagon] Adding memb instruction. Fixing whitespace...
2014-12-22 Colin LeMahieu[Hexagon] Adding classes and load unsigned byte instruc...
2014-12-19 Colin LeMahieu[Hexagon] Removing old variants of instructions and...
2014-12-19 Colin LeMahieu[Hexagon] Adding bit extraction and table indexing...
2014-12-19 Colin LeMahieu[Hexagon] Adding bit insertion instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding more xtype shift instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding xtype shift instructions.
2014-12-19 Colin LeMahieu[Hexagon] Adding transfers to and from control registers.
2014-12-19 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-18 Colin LeMahieuReverting 224550, was not ready for commit.
2014-12-18 Colin LeMahieu[Hexagon] Adding loop0/1 sp0/1/2loop0 instructions.
2014-12-16 Colin LeMahieu[Hexagon] Updating doubleword shift usages to new versions.
2014-12-16 Colin LeMahieu[Hexagon] Adding tstbit/bitclr/bitset instructions.
2014-12-16 Colin LeMahieu[Hexagon] Adding bit count and twiddling instructions.
2014-12-16 Colin LeMahieu[Hexagon] Adding asr/lsr/asl reg/imm, asl with saturati...
2014-12-16 Colin LeMahieu[Hexagon] Adding absolute value, and negate with saturation
2014-12-16 Colin LeMahieu[Hexagon] Adding saturate and swizzle instructions.
2014-12-16 Zoran Jovanovic[mips][microMIPS] Implement SWP and LWP instructions
2014-12-16 Vladimir MedicAdd disassembler tests for mips4 platform. There are...
2014-12-16 Colin LeMahieu[Hexagon] Adding doubleword multiplies with and without...
2014-12-15 Colin LeMahieu[Hexagon] Adding halfword to doubleword multiplies.
2014-12-15 Colin LeMahieu[Hexagon] Adding logical-logical accumulation instructi...
2014-12-15 Colin LeMahieu[Hexagon] Adding a number of additional multiply forms...
2014-12-15 Colin LeMahieu[Hexagon] Adding misc multiply encodings and tests.
2014-12-15 Colin LeMahieu[Hexagon] Adding doubleworld accumulating multiplies...
2014-12-15 Colin LeMahieu[Hexagon] Adding accumulating half word multiplies.
2014-12-15 Colin LeMahieu[Hexagon] Adding multiply with rnd/sat/rndsat
2014-12-15 Colin LeMahieu[Hexagon] Adding encoding bits for halfword multiplies.
2014-12-15 Reid KlecknerMove mips1 tests to test/MC/Disassembler/Mips/mips1
2014-12-15 Vladimir MedicAdd disassembler tests for mips3 platform. There are...
2014-12-15 Vladimir MedicAdd disassembler tests for mips2 platform. There are...
2014-12-15 Vladimir MedicThis is the first in a series of patches that add missi...
2014-12-12 Colin LeMahieu[Hexagon] Adding double word add/min/minu/max/maxu...
2014-12-12 Colin LeMahieu[Hexagon] Adding J class call instructions.
2014-12-11 Colin LeMahieu[Hexagon] Adding encoding information for sign extend...
2014-12-10 Colin LeMahieu[Hexagon] Adding combine ri/ir instructions.
2014-12-10 Colin LeMahieu[Hexagon] Adding encodings for JR class instructions...
2014-12-10 Colin LeMahieu[Hexagon] Adding JR class predicated call reg instructions.
2014-12-09 Colin LeMahieu[Hexagon] Fixing broken tests.
2014-12-09 Colin LeMahieu[Hexagon] Updating rr/ri 32/64 transfer encodings and...
2014-12-09 Colin LeMahieu[Hexagon] Adding word combine dot-new form and replacin...
2014-12-09 Colin LeMahieu[Hexagon] Updating predicate register transfers and...
2014-12-08 Colin LeMahieu[Hexagon] Adding any8, all8, and/or/xor/andn/orn/not...
2014-12-08 Colin LeMahieu[Hexagon] Fixing broken test.
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype doubleword add, sub, and, or...
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype doubleword comparisons. Removin...
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype parity, min, minu, max, maxu...
2014-12-08 Colin LeMahieu[Hexagon] Adding xtype halfword add/sub ll/hl/lh/hh...
2014-12-08 Colin LeMahieu[Hexagon] Adding add/sub with saturation. Removing...
2014-12-08 Colin LeMahieu[Hexagon] Adding combine reg, reg with predicated forms.
2014-12-08 Colin LeMahieu[Hexagon] Adding packhl instruction.
2014-12-05 Colin LeMahieu[Hexagon] Adding sub/and/or reg, imm forms
2014-12-05 Colin LeMahieu[Hexagon] Updating mux_ir/ri/ii/rr with encoding bits
2014-12-05 Colin LeMahieu[Hexagon] Adding tfrih/l instructions.
2014-12-05 Colin LeMahieu[Hexagon] Adding add reg, imm form with encoding bits...
2014-12-05 Colin LeMahieu[Hexagon] Adding DoubleRegs decoder. Moving C2_mux...
2014-12-05 Colin LeMahieu[Hexagon] Adding combine reg-reg forms.
2014-12-05 Colin LeMahieu[Hexagon] Marking several instructions as isCodeGenOnly...
2014-12-04 Colin LeMahieu[Hexagon] Adding lit exception if Hexagon isn't built.
2014-12-04 Colin LeMahieu[Hexagon] Marking some instructions as CodeGenOnly...
2014-12-02 Asiri RathnayakeAdd support for ARM modified-immediate assembly syntax.
2014-12-01 Vladimir MedicThe andi16, addiusp and jraddiusp micromips instruction...
2014-12-01 Charlie TurnerAdd post-decode checking of HVC instruction.
2014-12-01 Charlie TurnerAdd Thumb HVC and ERET virtualisation extension instruc...
2014-12-01 Charlie TurnerAdd ARM ERET and HVC virtualisation extension instructions.
2014-11-30 Hal Finkel[PowerPC] Add asm support for cache-inhibited ld/st...
2014-11-29 Jozef Kolek[mips][microMIPS] Implement NOP aliases
2014-11-28 Charlie TurnerFix wrong encoding of MRSBanked.
2014-11-27 Daniel Sanders[mips] Add synci instruction.
2014-11-27 Jozef Kolek[mips][microMIPS] Implement disassembler support for...
2014-11-26 Jozef Kolek[mips][microMIPS] Implement disassembler support for...
2014-11-25 Hal Finkel[PowerPC] Add the 'attn' instruction
2014-11-24 Jozef Kolek[mips][microMIPS] Implement disassembler support for...
2014-11-19 Zoran Jovanovic[mips][micromips] Implement SWM32 and LWM32 instructions
2014-11-19 Jozef Kolek[mips][microMIPS] Add disassembler tests for new microM...
2014-11-05 Oliver StannardFix bashism in tests added by r221341
2014-11-05 Oliver Stannard[ARM] Honor FeatureD16 in the assembler and disassembler
2014-11-04 Colin LeMahieu[Hexagon] Reverting 220584 to address ASAN errors.
2014-11-03 Charlie TurnerRemove the cortex-a9-mp CPU.
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