[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.
authorColin LeMahieu <colinl@codeaurora.org>
Tue, 9 Dec 2014 20:23:30 +0000 (20:23 +0000)
committerColin LeMahieu <colinl@codeaurora.org>
Tue, 9 Dec 2014 20:23:30 +0000 (20:23 +0000)
commit20856353b82937350dad01a62c6e22cd6196db47
tree9f8f3a6626d52a6f6efc9a1fae4ea3f76dc354bf
parentb8755d9dddf2f6e0c8802948699dc4a573815cad
[Hexagon] Updating rr/ri 32/64 transfer encodings and adding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223821 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonCopyToCombine.cpp
lib/Target/Hexagon/HexagonFixupHwLoops.cpp
lib/Target/Hexagon/HexagonHardwareLoops.cpp
lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
lib/Target/Hexagon/HexagonInstrInfo.cpp
lib/Target/Hexagon/HexagonInstrInfo.td
lib/Target/Hexagon/HexagonInstrInfoV4.td
lib/Target/Hexagon/HexagonInstrInfoV5.td
lib/Target/Hexagon/HexagonSplitTFRCondSets.cpp
test/MC/Disassembler/Hexagon/alu32_alu.txt
test/MC/Disassembler/Hexagon/alu32_pred.txt