[Hexagon] Adding add reg, imm form with encoding bits and test.
authorColin LeMahieu <colinl@codeaurora.org>
Fri, 5 Dec 2014 19:51:23 +0000 (19:51 +0000)
committerColin LeMahieu <colinl@codeaurora.org>
Fri, 5 Dec 2014 19:51:23 +0000 (19:51 +0000)
commit189606dbfea4429f23dd53fc6e64787fb094129b
tree47845c1fe218ff7f49968752570b9b6a7351981f
parent98821ee3501f5fd1f2076499922034ad1a1fe30c
[Hexagon] Adding add reg, imm form with encoding bits and test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223504 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonInstrInfo.td
test/MC/Disassembler/Hexagon/alu32_alu.txt