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(parent: 4344941) | patch
Add post-decode checking of HVC instruction.
authorCharlie Turner <charlie.turner@arm.com>
Mon, 1 Dec 2014 08:50:27 +0000 (08:50 +0000)
committerCharlie Turner <charlie.turner@arm.com>
Mon, 1 Dec 2014 08:50:27 +0000 (08:50 +0000)
commit94df8b11bc532942c1576d8cc532e8a7713e42b6
tree8a293b7c2a24f81c80d72e9e5aa5b3391b0d59dctree | snapshot
parent434494196bc04087748844e2c9095a7d8ada88cbcommit | diff
Add post-decode checking of HVC instruction.

Add checkDecodedInstruction for post-decode checking of instructions, to catch
the corner cases like HVC that don't fit into the general pattern. Needed to
check for an invalid condition field in instruction encoding despite HVC not
taking a predicate.

Patch by Matthew Wahab.

Change-Id: I48e28de981d7a9e43569594da3c45fb478b4f795

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222992 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/Disassembler/ARMDisassembler.cpp diff | blob | history
test/MC/Disassembler/ARM/invalid-virtexts.arm.txt [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors