Move all of the header files which are involved in modelling the LLVM IR
[oota-llvm.git] / lib / Target / ARM / Thumb1RegisterInfo.cpp
2013-01-02 Chandler CarruthMove all of the header files which are involved in...
2012-12-19 Jakob Stoklund OlesenRemove the explicit MachineInstrBuilder(MI) constructor.
2012-12-03 Chandler CarruthUse the new script to sort the includes of every file...
2012-05-07 Jakob Stoklund OlesenAdd an MF argument to TRI::getPointerRegClass() and...
2012-04-20 Craig TopperConvert more uses of XXXRegisterClass to &XXXRegClass...
2012-03-17 Craig TopperReorder includes to match coding standards. Fix an...
2012-03-01 Jakob Stoklund OlesenHandle regmasks in Thumb1RegisterInfo::saveScavengerReg...
2012-02-28 Jakob Stoklund OlesenEnable ARM base pointer when calling functions with...
2012-02-18 Jia LiuEmacs-tag and some comment fix for all ARM, CellSPU...
2012-02-07 Craig TopperConvert assert(0) to llvm_unreachable
2011-12-07 Evan ChengAdd bundle aware API for querying instruction propertie...
2011-10-10 Chad RosierFix a regression from r138445. If we're loading from...
2011-08-24 Jim GrosbachThumb1 ADD/SUB SP instructions are predicable in Thumb2...
2011-08-17 Jim Grosbach80 columns.
2011-08-17 Jim GrosbachTidy up.
2011-08-12 Duncan SandsSilence a bunch (but not all) "variable written but...
2011-07-20 Evan ChengSink ARMMCExpr and ARMAddressingModes into MC layer...
2011-07-18 Evan ChengMove getInitialFrameState from TargetFrameInfo to MCAsm...
2011-06-30 Jim GrosbachRefact ARM Thumb1 tMOVr instruction family.
2011-06-30 Jim GrosbachThumb1 register to register MOV instruction is predicable.
2011-06-29 Jim GrosbachRefactor away tSpill and tRestore pseudos in ARM backend.
2011-06-28 Evan Cheng- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
2011-06-02 Jakob Stoklund OlesenUse TRI::has{Sub,Super}ClassEq() where possible.
2011-04-26 Jakob Stoklund OlesenAdd a TRI::getLargestLegalSuperClass hook to provide...
2011-04-18 Jim GrosbachTrim a few unneeded includes.
2011-03-31 Jakob Stoklund OlesenProvide a legal pointer register class when targeting...
2011-03-05 Anton KorobeynikovIn Thumb1 mode the constant might be materialized via...
2011-03-05 Anton KorobeynikovImplement frame unwinding information emission for...
2011-03-05 Anton KorobeynikovPreliminary support for ARM frame save directives emiss...
2011-01-13 Jim GrosbachWhen updating a tSpill/tRestore instruction to be a...
2011-01-10 Anton KorobeynikovRename TargetFrameInfo into TargetFrameLowering. Also...
2010-12-21 Eric ChristopherIf we're not using reg+reg offset we're using reg+imm...
2010-12-16 Bill WendlingAdd tSpill and tRestore to the opcodes to replace with...
2010-12-15 Jim GrosbachThumb1 had two patterns for the same load-from-constant...
2010-12-15 Bill WendlingIf we're changing the frame register to a physical...
2010-12-14 Bill WendlingThe tLDR et al instructions were emitting either a...
2010-11-19 Benjamin KramerAvoid release build warnings.
2010-11-18 Anton KorobeynikovMove hasFP() and few related hooks to TargetFrameInfo.
2010-11-15 Anton KorobeynikovFirst step of huge frame-related refactoring: move...
2010-11-02 Jim GrosbachRevert r114340 (improvements in Darwin function prologu...
2010-10-19 Jim GrosbachAdd a pre-dispatch SjLj EH hook on the unwind edge...
2010-09-20 Jim GrosbachSimplify ARM callee-saved register handling by removing...
2010-09-03 Jim GrosbachRe-apply r112883:
2010-09-03 Daniel DunbarRevert "For ARM stack frames that utilize variable...
2010-09-02 Jim GrosbachFor ARM stack frames that utilize variable sized object...
2010-08-26 Jim GrosbachSimplify eliminateFrameIndex() interface back down...
2010-08-19 Jim GrosbachAdd Thumb1 support for virtual frame indices.
2010-08-10 Evan ChengRe-apply r110655 with fixes. Epilogue must restore...
2010-08-10 Daniel DunbarRevert r110655, "Fix ARM hasFP() semantics. It should...
2010-08-10 Evan ChengFix ARM hasFP() semantics. It should return true whenev...
2010-07-20 Eric ChristopherConstify some arguments.
2010-07-11 Rafael EspindolaMake getPhysicalRegisterRegClass non-virtual. Should...
2010-06-29 Jim Grosbachskip dbg_value instructions
2010-05-04 Jim Grosbachrdar://7937137 - dbg values not being handled in thumb1...
2010-04-15 Dan GohmanReuseFrameIndexVals is used in multiple files, so it...
2010-04-15 Dan GohmanAdd const qualifiers to CodeGen's use of LLVM IR constr...
2010-04-02 Chris Lattneruse DebugLoc default ctor instead of DebugLoc::getUnkno...
2010-03-13 Bob WilsonChange ARM ld/st multiple instructions to have variant...
2010-03-10 Jim Grosbachcomment why we use custom epilogue for t1 functions...
2010-03-10 Jim GrosbachClear up the last (famous last words) frame index value...
2010-03-09 Jim GrosbachChange the Value argument to eliminateFrameIndex to...
2010-03-09 Jim Grosbachscavenged frame index value re-use gets confused when...
2010-03-06 Jim GrosbachThumb1 epilogue code generation needs to take into...
2010-02-24 Jim Grosbachhandle very large call frames when require SPAdj !...
2010-01-19 Jakob Stoklund OlesenRemove predicates when changing an add into an unpredic...
2009-12-03 Chris Lattnerimprove portability to avoid conflicting with std:...
2009-11-09 Jim GrosbachUse Unified Assembly Syntax for the ARM backend.
2009-11-07 Jim Grosbach80-column cleanup of file header comments
2009-10-28 Jim GrosbachCleanup now that frame index scavenging via post-pass...
2009-10-22 Evan ChengTrim more includes.
2009-10-21 Jim GrosbachMissing piece of the ARM frame index post-scavenging...
2009-10-20 Jim GrosbachNow that all ARM subtargets use frame index scavenging...
2009-10-19 Jim GrosbachEnable allocation of R3 in Thumb1
2009-10-19 Jim GrosbachAdjust the scavenge register spilling to allow the...
2009-10-08 Jim GrosbachCleanup up unused R3LiveIn tracking.
2009-10-08 Jim GrosbachRe-enable register scavenging in Thumb1 by default.
2009-10-07 Jim Grosbachreverting thumb1 scavenging default due to test failure...
2009-10-07 Jim GrosbachEnable thumb1 register scavenging by default.
2009-10-07 Jim GrosbachAdd register-reuse to frame-index register scavenging...
2009-10-05 Jim GrosbachIn Thumb1, the register scavenger is not always able...
2009-10-01 Evan ChengARM::tPOP and tPOP_RET each has an extra writeback...
2009-09-24 Jim GrosbachStart of revamping the register scavenging in PEI....
2009-09-06 Duncan SandsRemove some unused variables and methods warned about by
2009-08-13 Owen AndersonPush LLVMContexts through the IntegerType APIs.
2009-08-11 Evan ChengShrinkify Thumb2 load / store multiple instructions.
2009-08-11 Jim GrosbachWhitespace cleanup. Remove trailing whitespace.
2009-08-10 Owen AndersonRename MVT to EVT, in preparation for splitting SimpleV...
2009-07-28 Evan ChengtADDrSPI doesn't have a predicate operand, but tADDhirr...
2009-07-28 Evan Cheng- More refactoring. This gets rid of all of the getOpco...
2009-07-26 Evan ChengRename tMOVhi2lor to tMOVgpr2tgpr. It's not moving...
2009-07-26 Evan ChengRefactor. Get rid of a few more getOpcode() calls.
2009-07-24 Owen AndersonRevert the ConstantInt constructors back to their 2...
2009-07-24 David GoodwinCorrectly handle the Thumb-2 imm8 addrmode. Specialize...
2009-07-22 Owen AndersonGet rid of the Pass+Context magic.
2009-07-20 Evan ChengFix PR4567. Thumb1 target was using the wrong instructi...
2009-07-19 Evan ChengFix a regression from 76124. Thumb1 instructions defaul...
2009-07-16 Anton KorobeynikovEmit cross regclass register moves for thumb2.
2009-07-16 Evan ChengLet callers decide the sub-register index on the def...
2009-07-14 Owen AndersonMove EVER MORE stuff over to LLVMContext.
2009-07-14 Torok Edwinllvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE...
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