Fix ARM vcvt encoding when the number of fractional bits is zero.
[oota-llvm.git] / lib / Target / ARM / ARMInstrNEON.td
2013-08-22 Mihai PopaFix ARM vcvt encoding when the number of fractional...
2013-07-22 Tim NorthoverARM: remove now unneeded custom Asm converters
2013-07-19 Joey Gouly[ARMv8] Implement the NEON instructions VRINT{N, X...
2013-07-18 Joey GoulyChange 'n' to 'N' to keep consistent with other instruc...
2013-07-18 Joey Gouly[ARMv8] Add NEON instructions VCVT{A, N, P, M}.
2013-07-18 Joey GoulyRemove the extra leading 0 from VMAXNMND.
2013-07-17 Joey Gouly[ARMv8] Add support for the NEON instructions vmaxnm...
2013-06-18 Jim GrosbachARM: Add optional datatype suffix to NEON mvn asm syntax.
2013-06-11 Amaury de la VieuvilleARM: Enforce decoding rules for VLDn instructions
2013-05-31 Tim NorthoverARM: fix VEXT encoding corner case
2013-05-20 Mihai PopaVSTn instructions have a number of encoding constraints...
2013-04-26 Benjamin KramerARM/NEON: Pattern match vector integer abs to vabs.
2013-04-15 Jim GrosbachARM: Add VACLT and VACLE assembly aliases.
2013-02-19 Arnold SchwaighoferARM NEON: Don't need COPY_TO_REGCLASS in pattern
2013-02-19 Arnold SchwaighoferARM NEON: Merge a f32 bitcast of a v2i32 extractelt
2013-02-14 Joel JonesThe ARM NEON vector compare instructions take three...
2012-12-20 Bob WilsonRevert "Adding support for llvm.arm.neon.vaddl[su]...
2012-12-20 Renato GolinAdding support for llvm.arm.neon.vaddl[su].* and
2012-11-16 Anton KorobeynikovMake sure FABS on v2f32 and v4f32 is legal on ARM NEON
2012-10-26 Jakob Stoklund OlesenRevert r163298 "Optimize codegen for VSETLNi{8,16,32...
2012-10-15 Jim GrosbachARM: v1i64 and v2i64 VBSL intrinsic support.
2012-10-10 Evan ChengAdd isel patterns for v2f32 / v4f32 neon.vbsl intrinsic...
2012-09-29 Bob WilsonAdd LLVM support for Swift.
2012-09-21 Jim GrosbachARM: Use a dedicated intrinsic for vector bitwise select.
2012-09-18 Evan ChengUse vld1 / vst2 for unaligned v2f64 load / store. e...
2012-09-06 Tim NorthoverUse correct part of complex operand to encode VST1...
2012-09-06 James MolloyOptimize codegen for VSETLNi{8,16,32} operating on...
2012-08-15 Evan ChengUse vld1/vst1 to load/store f64 if alignment is < 4...
2012-08-13 Tim NorthoverUse correct loads for vector types during extending...
2012-07-18 Joel JonesMore replacing of target-dependent intrinsics with...
2012-07-13 Joel JonesThis is one of the first steps at moving to replace...
2012-07-10 Jim GrosbachARM: Allow more flexible patterns in NEON formats.
2012-05-02 Jim GrosbachARM: Add missing two-operand VBIC aliases.
2012-04-27 Lang HamesFix the order of the operands in the llvm.fma intrinsic...
2012-04-26 Tim NorthoverUse VLD1 in NEON extenting-load patterns instead of...
2012-04-23 Jim GrosbachTidy up. 80 columns, whitespace, et. al.
2012-04-23 Jim GrosbachARM: VSLI two-operand assmebly aliases are tblgen'erated.
2012-04-23 Jim GrosbachARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand...
2012-04-23 Jim GrosbachARM: vqdmulh two-operand aliases are tblgen'erated...
2012-04-20 Jim GrosbachARM: tblgen'erate more NEON two-operand aliases.
2012-04-20 Jim GrosbachARM: tblgen'erate more NEON two-operand aliases.
2012-04-20 Jim GrosbachARM: Update NEON assembly two-operand aliases.
2012-04-17 James MolloyFix bad EXTRACT_SUBREG in instruction selection for...
2012-04-16 Jim GrosbachARM two-operand forms for vhadd and vhsub instructions.
2012-04-16 Jim GrosbachARM assembly two-operand forms for VRSHL.
2012-04-16 Jim GrosbachARM two-operand aliases for VRHADD instructions.
2012-04-11 Jim GrosbachARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.
2012-04-11 Jim GrosbachARM 'vzip.32 Dd, Dm' is a pseudo-instruction.
2012-04-11 Evan ChengAdd more fused mul+add/sub patterns. rdar://10139676
2012-04-11 Evan ChengClean up ARM fused multiply + add/sub support some...
2012-04-11 Evan ChengFix a number of problems with ARM fused multiply add...
2012-04-10 Evan ChengHandle llvm.fma.* intrinsics. rdar://10914096
2012-04-05 Jim GrosbachARM assembly aliases for two-operand V[R]SHR instructions.
2012-03-30 Jim GrosbachARM encoding for VSWP got the second operand incorrect.
2012-03-28 Jakob Stoklund OlesenSpill DPair registers, not just QPR.
2012-03-28 Richard BartonFixup VST1.32 with writeback instruction. Also re-facto...
2012-03-06 Jim GrosbachARM more NEON VLD/VST composite physical register refac...
2012-03-06 Jim GrosbachARM refactor more NEON VLD/VST instructions to use...
2012-03-05 Jim GrosbachARM Refactor VLD/VST spaced pair instructions.
2012-03-05 Jim GrosbachARM Remove a bit of dead code.
2012-03-05 Jim GrosbachARM refactor away a bunch of VLD/VST pseudo instructions.
2012-03-05 Sebastian Popupdated patch for the ARM fused multiply add/sub
2012-02-28 Jim GrosbachARM vbit/vbif/vbsl assembly optional size suffix.
2012-02-20 James MolloyImprove generated code for extending loads and some...
2012-02-18 Jia LiuEmacs-tag and some comment fix for all ARM, CellSPU...
2012-02-14 Lang HamesThird time's the charm...?
2012-02-14 Lang HamesUnswap swap operands, partially reducing confusion.
2012-02-13 Lang HamesMake operands for VSWP read-modify-write.
2012-01-25 Jim GrosbachNEON VLD4(all lanes) assembly parsing and encoding.
2012-01-24 Jim GrosbachTidy up. Rename VLD4DUP patterns for consistency.
2012-01-24 Jim GrosbachNEON VLD3(all lanes) assembly parsing and encoding.
2012-01-24 Jim GrosbachNEON VST4(one lane) assembly parsing and encoding.
2012-01-24 Jim GrosbachNEON VLD4(one lane) assembly parsing and encoding.
2012-01-24 Jim GrosbachNEON Two-operand assembly aliases for VSRA.
2012-01-24 Jim GrosbachNEON Two-operand assembly aliases for VSLI.
2012-01-24 Jim GrosbachNEON Two-operand assembly aliases for VSRI.
2012-01-24 Jim GrosbachNEON add correct predicates for some asm aliases.
2012-01-24 Jim GrosbachNEON VST4(multiple 4 element structures) assembly parsing.
2012-01-24 Jim GrosbachNEON VLD4(multiple 4 element structures) assembly parsing.
2012-01-24 Jim GrosbachFix typo.
2012-01-24 Jim GrosbachNEON VST3(single element from one lane) assembly parsing.
2012-01-23 Jim GrosbachNEON VST3(multiple 3-element structures) assembly parsing.
2012-01-23 Jim GrosbachNEON VLD3(multiple 3-element structures) assembly parsing.
2012-01-23 Jim GrosbachNEON VLD3 lane-indexed assembly parsing and encoding.
2012-01-23 Jim GrosbachSimplify some NEON assembly pseudo definitions.
2012-01-22 Anton KorobeynikovAdd fused multiple+add instructions from VFPv4.
2012-01-20 Bob WilsonARM vector any_extends need to be selected to vmovl...
2012-01-20 Jim GrosbachVST2 four-register w/ update pseudos for fixed/register...
2012-01-20 Jim GrosbachNEON use vmov.i32 to splat some f32 values into vectors.
2012-01-10 Jim GrosbachARM updating VST2 pseudo-lowering fixed vs. register...
2011-12-21 Jim GrosbachARM NEON mnemonic aliase for vrecpeq.
2011-12-21 Jim GrosbachARM NEON optional data type on VSWP instructions.
2011-12-21 Jim GrosbachARM NEON mnemonic aliases for vzipq and vswpq.
2011-12-21 Jim GrosbachARM NEON assmebly parsing for VLD2 to all lanes instruc...
2011-12-21 Jim GrosbachARM NEON VLD2 assembly parsing for structure to all...
2011-12-20 Jim GrosbachARM assembly parsing and encoding for VST2 single-eleme...
2011-12-20 Jim GrosbachARM assembly parsing and encoding for VLD2 single-eleme...
2011-12-19 Jim GrosbachARM NEON assembly aliases for VMOV<-->VMVN for i32...
2011-12-19 Jim GrosbachARM NEON two-operand aliases for VPADD.
2011-12-19 Jim GrosbachARM NEON implied destination aliases for VMAX/VMIN.
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