Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETL...
authorJames Molloy <james.molloy@arm.com>
Thu, 6 Sep 2012 09:16:01 +0000 (09:16 +0000)
committerJames Molloy <james.molloy@arm.com>
Thu, 6 Sep 2012 09:16:01 +0000 (09:16 +0000)
commit6c822eea47dbef96940819b1ea085fabc49a1e71
treee9d2318a4f16d3ae149ba9e4f2794ba5f28c5f07
parent7859f438e198fe441abef3d2c95c1cb9517f575b
Optimize codegen for VSETLNi{8,16,32} operating on Q registers. Degenerate to a VSETLN on D registers, instead of an (INSERT_SUBREG (VSETLN (EXTRACT_SUBREG ))) sequence to help the register coalescer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163298 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMExpandPseudoInsts.cpp
lib/Target/ARM/ARMInstrNEON.td
test/CodeGen/ARM/integer_insertelement.ll [new file with mode: 0644]
test/CodeGen/ARM/vget_lane.ll