[AArch64 NEON] Fix generating incorrect value type of NEON_VDUPLANE
[oota-llvm.git] / test / CodeGen / R600 /
2013-12-20 Tom StellardR600: Allow ftrunc
2013-12-19 NAKAMURA TakumiAdd REQUIRES:asserts to 3 tests in llvm/test/CodeGen...
2013-12-19 Matt ArsenaultR600/SI: Make private pointers be 32-bit.
2013-12-14 Matt ArsenaultR600/SI: Minor improvements to test.
2013-12-10 Matt ArsenaultR600/SI: Add i64 cmp tests
2013-12-10 Vincent LejeuneR600: Fix an infinite loop when trying to reorganize...
2013-12-10 Vincent LejeuneR600: Fix input modifiers lost for Cayman
2013-12-07 Vincent LejeuneAdd a RequireStructuredCFG Field to TargetMachine.
2013-12-05 Matt ArsenaultR600/SI: Add comments for number of used registers.
2013-12-02 Vincent LejeuneR600: Workaround for cayman loop bug
2013-11-27 Tom StellardR600: Expand vector FABS
2013-11-27 Tom StellardR600/SI: Implement spilling of SGPRs v5
2013-11-27 Tom StellardR600/SI: Use SGPR_32 register class for 32-bit SMRD...
2013-11-27 Tom StellardR600: Add support for ISD::FROUND
2013-11-22 Tom StellardR600/SI: Fixing handling of condition codes
2013-11-22 Tom StellardSelectionDAG: Optimize expansion of vec_type = BITCAST...
2013-11-18 Matt ArsenaultR600/SI: Fix moveToVALU when the first operand is VSrc.
2013-11-18 Matt ArsenaultR600/SI: Fix multiple SGPR reads when using VCC.
2013-11-18 Matt ArsenaultR600/SI: Implement add i64, but do not yet enable.
2013-11-18 Matt ArsenaultR600/SI: Move patterns to match add / sub to scalar...
2013-11-18 Tom StellardR600: Enable the IR structurizer by default
2013-11-18 Tom StellardR600: Fix a crash in the AMDILCFGStrucurizer
2013-11-18 Tom StellardR600/SI: Fix illegal VGPR->SGPR copy inside of loop
2013-11-18 Tom StellardR600/SI: Fix another case of illegal VGPR->SGPR copy
2013-11-17 Matt ArsenaultUse right address space pointer size
2013-11-16 Matt ArsenaultFix assert on unaligned access to global with different...
2013-11-16 Matt ArsenaultFix codegen for null different sized pointer.
2013-11-16 Vincent LejeuneR600: Make dot_4 instructions predicable
2013-11-15 Tom StellardR600/SI: Add VReg_96 register class to SIRegisterInfo...
2013-11-15 Matt ArsenaultAdd target hook to prevent folding some bitcasted loads.
2013-11-15 Tom StellardR600: Fix scheduling of instructions that use the LDS...
2013-11-14 Matt ArsenaultR600/SI: Add testcase for problem I ran into
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-11-13 Tom StellardR600/SI: Prefer SALU instructions for bit shift operations
2013-11-13 Matt ArsenaultR600: Fix selection failure on EXTLOAD
2013-11-12 Matt ArsenaultR600/SI: Change formatting of printed registers.
2013-11-11 Matt ArsenaultR600/SI: Add test that fails due to requiring i64 mul...
2013-11-11 Vincent LejeuneR600: Use function inputs to represent data stored...
2013-11-06 Vincent LejeuneR600: Fix LowerUDIVREM
2013-10-30 Matt ArsenaultFix CodeGen for unaligned loads with address spaces
2013-10-30 Tom StellardR600: Custom lower f32 = uint_to_fp i64
2013-10-29 Tom StellardR600/SI: Add compute support for CI v2
2013-10-29 Tom StellardR600: Expand vector FSQRT ops
2013-10-23 Tom StellardR600/SI: fix MIMG writemask adjustement
2013-10-23 Tom StellardR600: Fix handling of vector kernel arguments
2013-10-23 Tom StellardR600/SI: Add support for i64 bitwise or
2013-10-23 Tom StellardR600/SI: Use S_LOAD_DWORD instructions for v8i32 and...
2013-10-22 Tom StellardR600: Simplify handling of private address space
2013-10-21 Matt ArsenaultFix CodeGen for vectors of pointers with address spaces.
2013-10-21 Matt ArsenaultFix CodeGen for different size address space GEPs
2013-10-16 Tom StellardR600: Fix a crash in the AMDILCFGStructurizer
2013-10-13 Vincent LejeuneR600: improve dump of S_WAITCNT
2013-10-13 Vincent LejeuneR600: Use masked read sel for texture instructions
2013-10-13 Vincent LejeuneR600: fix swizzle export
2013-10-11 Matt ArsenaultR600: Add scalar i32 add test
2013-10-11 Matt ArsenaultUse CHECK-LABEL
2013-10-10 Matt ArsenaultR600: Fix trunc i64 to i32 on SI
2013-10-10 Tom StellardR600/SI: Use -verify-machineinstrs for most tests
2013-10-08 Matt ArsenaultAdd some xfaild R600 tests.
2013-10-01 Vincent LejeuneR600: add a pass that merges clauses.
2013-10-01 Vincent LejeuneR600: Put PRED_X instruction in its own clause
2013-10-01 Vincent LejeuneR600: Enable -verify-machineinstrs in some tests.
2013-09-30 Manman RenTBAA: update tbaa format from scalar format to struct...
2013-09-30 Manman RenTBAA: remove !tbaa from testing cases when they are...
2013-09-28 Tom StellardR600: Fix handling of NAN in comparison instructions
2013-09-12 Vincent LejeuneR600: Move code handling literal folding into R600ISelL...
2013-09-12 Vincent LejeuneR600: Move fabs/fneg/sel folding logic into PostProcessIsel
2013-09-12 Tom StellardR600/SI: expose TBUFFER_STORE_FORMAT_* for OpenGL trans...
2013-09-06 Aaron WatryR600: Add support for LDS atomic subtract
2013-09-06 Matt ArsenaultTeach CodeGenPrepare about address spaces
2013-09-05 Matt ArsenaultR600: Fix i64 to i32 trunc on SI
2013-09-05 Tom StellardR600: Add support for local memory atomic add
2013-09-05 Tom StellardR600: Expand SELECT nodes rather than custom lowering...
2013-09-05 Tom StellardR600: Fix incorrect LDS size calculation
2013-09-05 Tom StellardR600/SI: Don't emit S_WQM_B64 instruction for compute...
2013-09-04 Vincent LejeuneR600: Use shared op optimization when checking cycle...
2013-09-04 Vincent LejeuneR600: Non vector only instruction can be scheduled...
2013-09-04 Vincent LejeuneR600: Remove fmul.v4f32.ll test which is redundant...
2013-08-27 Michel DanzerR600/SI: Enable local-memory-two-objects lit test
2013-08-26 Tom StellardSelectionDAG: Remove unnecessary uses of TargetLowering...
2013-08-26 Tom StellardR600: Add support for vector local memory loads
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory loads
2013-08-26 Tom StellardSelectionDAG: Use correct pointer size when splitting...
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory stores
2013-08-26 Tom StellardR600: Add support for v4i32 and v2i32 local stores
2013-08-26 Tom StellardSelectionDAG: Use correct pointer size when lowering...
2013-08-22 Bill WendlingUpdate to remove the no-frame-pointer-elim-non-leaf...
2013-08-22 Tom StellardR600/SI: Fix another case of illegal VGPR to SGPR copy
2013-08-21 Tom StellardSelectionDAG: Make sure stores are always added to...
2013-08-16 Tom StellardR600: Expand vector FRINT ops
2013-08-16 Tom StellardR600: Expand vector FFLOOR ops
2013-08-16 Tom StellardR600: Expand vector float operations for both SI and...
2013-08-16 Michel DanzerR600/SI: Add pattern for xor of i1
2013-08-16 Michel DanzerR600/SI: Fix broken encoding of DS_WRITE_B32
2013-08-16 Tom StellardRevert "R600/SI: Fix incorrect encoding of DS_WRITE_B32...
2013-08-16 Tom StellardR600/SI: Fix incorrect encoding of DS_WRITE_B32 instruc...
2013-08-16 Tom StellardR600: Add support for global vector loads with element...
2013-08-16 Tom StellardR600: Add support for global vector stores with element...
2013-08-16 Tom StellardR600: Add support for i16 and i8 global stores
2013-08-16 Tom StellardR600: Add support for v4i32 stores on Cayman
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