move getNameWithPrefix and getSymbol to TargetMachine.
[oota-llvm.git] / lib / Target /
2014-02-19 Rafael Espindolamove getNameWithPrefix and getSymbol to TargetMachine.
2014-02-19 Rafael EspindolaAdd back r201608, r201622, r201624 and r201625
2014-02-19 Christian PirkerTest commit - remove the new line to lib/Target/AArch64...
2014-02-19 Daniel Sanders[mips] In the integrated assembler, select the default...
2014-02-19 Christian PirkerTest commit - added a new line to lib/Target/AArch64...
2014-02-19 Daniel Sanders[mips] Use llvm::Triple in ParseMipsTriple() instead...
2014-02-19 Daniel Sanders[mips] Remove unused NotN64 predicate
2014-02-19 Cameron McInallyFix AVX512 vector sqrt assembly strings.
2014-02-19 Daniel JasperRevert r201622 and r201608.
2014-02-19 Tim NorthoverX86 CodeGenPrep: sink shufflevectors before shifts
2014-02-19 Craig TopperRemove special FP opcode maps and instead add enough...
2014-02-19 Craig TopperReduce size of map field in X86 TSFlags since it now...
2014-02-19 Craig TopperPut some of the X86 formats in a more logical order.
2014-02-19 Craig TopperRemove A6/A7 opcode maps. They can all be handled with...
2014-02-18 Rafael EspindolaFix PR18743.
2014-02-18 Rafael EspindolaRename a DebugLoc variable to DbgLoc and a DataLayout...
2014-02-18 Ana Pazos[AArch64] Expanded sin, cos, pow with FP vector types...
2014-02-18 Robert LyttonXCore target: Handle common linkage
2014-02-18 Robert LyttonXCore target: addMemOperand as necessary
2014-02-18 Robert LyttonXCore target: Fix llvm.eh.return and EH info register...
2014-02-18 Tim NorthoverGlobalMerge: move "-global-merge" option to the pass...
2014-02-18 Tim NorthoverX86: use vpsllvd (& friends) for 16-bit shifts on Haswell
2014-02-18 Craig TopperAdd PS prefix to some classes I missed in r201538.
2014-02-18 Craig TopperAdd a bunch of OpSize32 tags to 64-bit mode only instru...
2014-02-18 Elena DemikhovskyAVX-512: Fixed size of mask registers
2014-02-18 Jiangning LiuFix a typo about lowering AArch64 va_copy.
2014-02-18 Craig TopperAdd an x86 prefix encoding for instructions that would...
2014-02-17 Kevin EnderbyFix the arm assembler so that this malformed instruction:
2014-02-17 Craig TopperFix diassembler handling of rex.b when mod=00/01/10...
2014-02-17 Elena DemikhovskyAVX-512: implemented zext fron i1 to i16
2014-02-16 Mark SeabornUse 16 byte stack alignment for NaCl on ARM
2014-02-16 Rafael EspindolaRemove dead code, we already require cmake 2.8.8.
2014-02-16 Elena DemikhovskyAVX-512: simpyfied BUILD_VECTOR for masks; fixed cmp...
2014-02-16 Saleem AbdulrasoolARM IAS: (partially) support .arch_extension directive
2014-02-15 Craig TopperAdd opcode extension forms of MOV8ri/MOV16ri/MOV32ri.
2014-02-14 Reed KotlerThis patch has two main functions:
2014-02-14 Artyom SkrobovGenerate the DWARF stack frame decode operations in...
2014-02-14 Kevin Qin[AArch64 NEON] Fix a bug to avoid using floating type...
2014-02-14 Jiangning LiuEnable AArch64 NEON by default.
2014-02-14 Hao Liu[AArch64]Fix the assertion failure caused by "v1i1...
2014-02-14 Juergen Ributzka[X86] Don't mark movabsq as cheap-as-move - it isn...
2014-02-13 Tom StellardR600/SI: Expand all v8[if]32 operations
2014-02-13 Tom StellardR600/SI: Add a pattern for i32 anyext
2014-02-13 Tom StellardR600/SI: Completely Disable TypeRewriter on compute
2014-02-13 Tom StellardR600/SI: Split global vector loads with more than 4...
2014-02-13 Daniel SandersRe-commit: Demote EmitRawText call in AsmPrinter::EmitI...
2014-02-13 Tim NorthoverARM: remove floating-point patterns for @llvm.arm.neon...
2014-02-13 Oliver StannardAdd Cortex-A53 and Cortex-A57 cores to the AArch64...
2014-02-13 Hao Liu[AArch64]Fix the problems that can't select mul/add...
2014-02-13 Hao Liu[AArch64]Add support for spilling FPR8/FPR16.
2014-02-12 Andrea Di Biagio[Vectorizer] Add a new 'OperandValueKind' in TargetTran...
2014-02-12 Andrea Di Biagio[X86] Teach the backend how to lower vector shift left...
2014-02-12 Daniel SandersRevert r201237+r201238: Demote EmitRawText call in...
2014-02-12 Daniel SandersDemote EmitRawText call in AsmPrinter::EmitInlineAsm...
2014-02-12 Benjamin KramerR600: Always implement both versions of isTruncateFree...
2014-02-12 Craig TopperMark XACQUIRE_PREFIX/XRELEASE_PREFIX as isAsmParserOnly...
2014-02-11 Evan ChengTweak ARM fastcc by adopting these two AAPCS rules:
2014-02-11 Matt ArsenaultR600/SI: Fix assertion on infinite loops.
2014-02-11 Jim GrosbachARM: Thumb2 LDR(literal) can target SP.
2014-02-11 Robert LyttonXCore target: fix const section handling
2014-02-11 Robert Lytton XCore target: Lower ATOMIC_LOAD & ATOMIC_STORE
2014-02-11 Elena DemikhovskyAVX: fixed a bug in LowerVECTOR_SHUFFLE
2014-02-11 Elena DemikhovskyAVX-512: Optimized BUILD_VECTOR pattern;
2014-02-10 Matt ArsenaultR600: Implement isTruncateFree
2014-02-10 Tom StellardR600/SI: Initialize M0 and emit S_WQM_B64 whenever...
2014-02-10 Tom StellardR600/SI: Only use S_WQM_B64 in pixel shaders
2014-02-10 Tim NorthoverARM: use natural LLVM IR for vshll instructions
2014-02-10 Chad Rosier[AArch64] Handle aliases of conditional branches withou...
2014-02-10 Oliver StannardARM: r12 is callee-saved for interrupt handlers
2014-02-10 Tim NorthoverARM: use LLVM IR to represent the vshrn operation
2014-02-10 Matheus Almeida[mips][msa] Add DLSA instruction.
2014-02-10 Matheus Almeida[mips][msa] Make LSA_DESC a parameterizable class.
2014-02-10 Elena DemikhovskyAVX-512: Fixed extract_vector_elt for v16i1 and v8i1...
2014-02-10 Craig TopperRecommit r201059 and r201060 with hopefully a fix for...
2014-02-10 Bob WilsonRevert r201059 and r201060.
2014-02-10 Hao Liu[AArch64]Implement the copy of two FPR8 registers by...
2014-02-10 Craig TopperAdd MRMXr/MRMXm form to X86 for use by instructions...
2014-02-09 Rafael EspindolaUse a consistent argument order in TargetLoweringObject...
2014-02-08 Rafael EspindolaPass the Mangler by reference.
2014-02-08 Rafael EspindolaAdd LLVM_OVERRIDE to a few declarations.
2014-02-07 Rafael EspindolaRemove dead code.
2014-02-07 Renato GolinRemove -arm-disable-ehabi option
2014-02-07 Sasa Stankovic[mips] Forbid the use of registers t6, t7 and t8 if...
2014-02-07 Oliver StannardLLVM-1163: AAPCS-VFP violation when CPRC allocated...
2014-02-07 Venkatraman Govind... [Sparc] Add support for parsing synthetic instruction...
2014-02-07 Venkatraman Govind... [Sparc] Emit correct encoding for atomic instructions...
2014-02-07 Venkatraman Govind... [Sparc] Emit relocations for Thread Local Storage ...
2014-02-07 Venkatraman Govind... [Sparc] Emit correct relocations for PIC code when...
2014-02-07 Venkatraman Govind... [Sparc] Use SparcMCExpr::VariantKind itself as MachineO...
2014-02-07 Jim GrosbachX86: Resolve a long standing FIXME and properly isel...
2014-02-06 Evan ChengRevert r200095 and r200152. It turns out when compiling...
2014-02-06 Tom StellardR600/SI: Add a MUBUF store pattern for Reg+Imm offsets
2014-02-06 Tom StellardR600/SI: Add a MUBUF store pattern for Imm offsets
2014-02-06 Tom StellardR600/SI: Add a MUBUF load pattern for Reg+Imm offsets
2014-02-06 Tom StellardR600/SI: Use immediates offsets for SMRD instructions...
2014-02-06 David PeixottoRemove const_cast for STI when parsing inline asm
2014-02-06 Tim NorthoverX86: add costs for 64-bit vector ext/trunc & rebalance
2014-02-06 Tim NorthoverX86: deduplicate V[SZ]EXT_MOVL and V[SZ]EXT nodes
2014-02-06 Kevin EnderbyUpdate the X86 assembler for .intel_syntax to accept
2014-02-06 Rafael Espindoladon't set HasReliableSymbolDifference for ELF.
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