Revert r201237+r201238: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and...

It introduced multiple test failures in the buildbots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201241 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/MC/MCAsmInfo.h b/include/llvm/MC/MCAsmInfo.h
index f039ba0db15607734f09eeaa7736cce684f5d799..b74ae8463508c68817b5159151288c792aeb6ef6 100644 (file)
--- a/include/llvm/MC/MCAsmInfo.h
+++ b/include/llvm/MC/MCAsmInfo.h
@@ -299,14 +299,6 @@ namespace llvm {
 
     std::vector<MCCFIInstruction> InitialFrameState;
 
-    //===--- Integrated Assembler State ----------------------------------===//
-    /// Should we use the integrated assembler?
-    /// The integrated assembler should be enabled by default (by the
-    /// constructors) when failing to parse a valid piece of assembly (inline
-    /// or otherwise) is considered a bug. It may then be overridden after
-    /// construction (see LLVMTargetMachine::initAsmInfo()).
-    bool UseIntegratedAssembler;
-
   public:
     explicit MCAsmInfo();
     virtual ~MCAsmInfo();
@@ -534,14 +526,6 @@ namespace llvm {
     const std::vector<MCCFIInstruction> &getInitialFrameState() const {
       return InitialFrameState;
     }
-
-    /// Return true if assembly (inline or otherwise) should be parsed.
-    bool useIntegratedAssembler() const { return UseIntegratedAssembler; }
-
-    /// Set whether assembly (inline or otherwise) should be parsed.
-    void setUseIntegratedAssembler(bool Value) {
-      UseIntegratedAssembler = Value;
-    }
   };
 }
 

diff --git a/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp b/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
index 66379d7ee9a845f6a0cf4dce58ab101d26dad582..8badf429d2dd3d5fd67a7e4ebae2c738d41ad621 100644 (file)
--- a/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
@@ -79,14 +79,10 @@ void AsmPrinter::EmitInlineAsm(StringRef Str, const MDNode *LocMDNode,
   if (isNullTerminated)
     Str = Str.substr(0, Str.size()-1);
 
-  // If the output streamer does not have mature MC support or the integrated
-  // assembler has been disabled, just emit the blob textually.
-  // Otherwise parse the asm and emit it via MC support.
+  // If the output streamer is actually a .s file, just emit the blob textually.
   // This is useful in case the asm parser doesn't handle something but the
   // system assembler does.
-  const MCAsmInfo *MCAI = TM.getMCAsmInfo();
-  assert(MCAI && "No MCAsmInfo");
-  if (!MCAI->useIntegratedAssembler()) {
+  if (OutStreamer.hasRawTextSupport()) {
     OutStreamer.EmitRawText(Str);
     emitInlineAsmEnd(TM.getSubtarget<MCSubtargetInfo>(), 0);
     return;

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 51cd9d68617c5469d8368da1defc53d0bc6b4c5a..d897757ab710b63247668b3026e90551f20c6295 100644 (file)
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -53,10 +53,6 @@ static cl::opt<cl::boolOrDefault>
 AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
            cl::init(cl::BOU_UNSET));
 
-static cl::opt<bool>
-NoIntegratedAssembler("no-integrated-as", cl::Hidden,             
-                      cl::desc("Disable integrated assembler"));
-
 static bool getVerboseAsm() {
   switch (AsmVerbose) {
   case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
@@ -67,20 +63,14 @@ static bool getVerboseAsm() {
 }
 
 void LLVMTargetMachine::initAsmInfo() {
-  MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(),
-                                                    TargetTriple);
+  AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
   // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
   // and if the old one gets included then MCAsmInfo will be NULL and
   // we'll crash later.
   // Provide the user with a useful error message about what's wrong.
-  assert(TmpAsmInfo && "MCAsmInfo not initialized. "
+  assert(AsmInfo && "MCAsmInfo not initialized. "
          "Make sure you include the correct TargetSelect.h"
          "and that InitializeAllTargetMCs() is being invoked!");
-
-  if (NoIntegratedAssembler)
-    TmpAsmInfo->setUseIntegratedAssembler(false);
-
-  AsmInfo = TmpAsmInfo;
 }
 
 LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,

diff --git a/lib/MC/MCAsmInfo.cpp b/lib/MC/MCAsmInfo.cpp
index 0243f008fc9b7f6bc808d6798122f874b8f56448..7ece2729a929ddb4ec34e817193c696eeffa7772 100644 (file)
--- a/lib/MC/MCAsmInfo.cpp
+++ b/lib/MC/MCAsmInfo.cpp
@@ -86,20 +86,6 @@ MCAsmInfo::MCAsmInfo() {
   DwarfRegNumForCFI = false;
   NeedsDwarfSectionOffsetDirective = false;
   UseParensForSymbolVariant = false;
-
-  // FIXME: Clang's logic should be synced with the logic used to initialize
-  //        this member and the two implementations should be merged.
-  // For reference:
-  // - Solaris always enables the integrated assembler by default
-  //   - SparcELFMCAsmInfo and X86ELFMCAsmInfo are handling this case
-  // - Windows always enables the integrated assembler by default
-  //   - MCAsmInfoCOFF is handling this case, should it be MCAsmInfoMicrosoft?
-  // - MachO targets always enables the integrated assembler by default
-  //   - MCAsmInfoDarwin is handling this case
-  // - Generic_GCC toolchains enable the integrated assembler on a per
-  //   architecture basis.
-  //   - The target subclasses for AArch64, ARM, and X86  handle these cases
-  UseIntegratedAssembler = false;
 }
 
 MCAsmInfo::~MCAsmInfo() {

diff --git a/lib/MC/MCAsmInfoCOFF.cpp b/lib/MC/MCAsmInfoCOFF.cpp
index 99456379f7b9247787231598ed0cb311ce9df90d..f11227c6474c93249260ea7cd8d7e9b28b296fef 100644 (file)
--- a/lib/MC/MCAsmInfoCOFF.cpp
+++ b/lib/MC/MCAsmInfoCOFF.cpp
@@ -35,8 +35,6 @@ MCAsmInfoCOFF::MCAsmInfoCOFF() {
   HasLEB128 = true;  // Target asm supports leb128 directives (little-endian)
   SupportsDebugInformation = true;
   NeedsDwarfSectionOffsetDirective = true;
-
-  UseIntegratedAssembler = true;
 }
 
 void MCAsmInfoMicrosoft::anchor() { }

diff --git a/lib/MC/MCAsmInfoDarwin.cpp b/lib/MC/MCAsmInfoDarwin.cpp
index e907b7510293f60e3243ce1e7ef1267824d40723..d5382e69538498969fca34bd6612c3ae14d4e858 100644 (file)
--- a/lib/MC/MCAsmInfoDarwin.cpp
+++ b/lib/MC/MCAsmInfoDarwin.cpp
@@ -57,6 +57,4 @@ MCAsmInfoDarwin::MCAsmInfoDarwin() {
   HasNoDeadStrip = true;
 
   DwarfUsesRelocationsAcrossSections = false;
-
-  UseIntegratedAssembler = true;
 }

diff --git a/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp b/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
index 189d4eba81a35166e4110b1508fb5c98a1a07cef..e9747d686688817fdca4fd8e379fc5b821b88e94 100644 (file)
--- a/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
+++ b/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
@@ -35,8 +35,6 @@ AArch64ELFMCAsmInfo::AArch64ELFMCAsmInfo() {
 
   // Exceptions handling
   ExceptionsType = ExceptionHandling::DwarfCFI;
-
-  UseIntegratedAssembler = true;
 }
 
 // Pin the vtable to this file.

diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
index 4c5f21a05420fa93b3487e0593e34d9cf6e664cc..3c3df1ec6a4bc18fedffaeba0dc2d4fe10ca2620 100644 (file)
--- a/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp
@@ -29,8 +29,6 @@ ARMMCAsmInfoDarwin::ARMMCAsmInfoDarwin() {
 
   // Exceptions handling
   ExceptionsType = ExceptionHandling::SjLj;
-
-  UseIntegratedAssembler = true;
 }
 
 void ARMELFMCAsmInfo::anchor() { }
@@ -52,6 +50,4 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo() {
 
   // foo(plt) instead of foo@plt
   UseParensForSymbolVariant = true;
-
-  UseIntegratedAssembler = true;
 }

diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
index b30ca9e9ab2f27e1b595cc78f60ba066d3f58834..fcd22fa5dafa521d1191f898ed66f6c3ad1ff6c2 100644 (file)
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp
@@ -38,13 +38,11 @@ PPCMCAsmInfoDarwin::PPCMCAsmInfoDarwin(bool is64Bit, const Triple& T) {
   // rather than OS version
   if (T.isMacOSX() && T.isMacOSXVersionLT(10, 6))
     HasWeakDefCanBeHiddenDirective = false;
-
-  UseIntegratedAssembler = true;
 }
 
 void PPCLinuxMCAsmInfo::anchor() { }
 
-PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit, const Triple& T) {
+PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit) {
   if (is64Bit) {
     PointerSize = CalleeSaveStackSlotSize = 8;
   }
@@ -73,9 +71,5 @@ PPCLinuxMCAsmInfo::PPCLinuxMCAsmInfo(bool is64Bit, const Triple& T) {
   ZeroDirective = "\t.space\t";
   Data64bitsDirective = is64Bit ? "\t.quad\t" : 0;
   AssemblerDialect = 1;           // New-Style mnemonics.
-
-  if (T.getOS() == llvm::Triple::FreeBSD ||
-      (T.getOS() == llvm::Triple::NetBSD && !is64Bit))
-    UseIntegratedAssembler = true;
 }
 

diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
index cee2cb72a94ca0338effeb078875585dd8dbbc84..6e6152eab398db371b56fb4443143820478349be 100644 (file)
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h
@@ -29,7 +29,7 @@ class Triple;
   class PPCLinuxMCAsmInfo : public MCAsmInfoELF {
     virtual void anchor();
   public:
-    explicit PPCLinuxMCAsmInfo(bool is64Bit, const Triple&);
+    explicit PPCLinuxMCAsmInfo(bool is64Bit);
   };
 
 } // namespace llvm

diff --git a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index 105c51151f96038f93860a9e21c657ba261a7b30..57eb4facaa83b77349134e3de6be6239850dc483 100644 (file)
--- a/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -75,7 +75,7 @@ static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
   if (TheTriple.isOSDarwin())
     MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple);
   else
-    MAI = new PPCLinuxMCAsmInfo(isPPC64, TheTriple);
+    MAI = new PPCLinuxMCAsmInfo(isPPC64);
 
   // Initial state of the frame pointer is R1.
   unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;

diff --git a/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp b/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
index ef5f8ce15582489905bf640b1f56f90740ee2c0c..c59486804723b6bb5cbfca930b2bb20db25c8c9e 100644 (file)
--- a/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
+++ b/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
@@ -42,9 +42,6 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(StringRef TT) {
 
   SunStyleELFSectionSwitchSyntax = true;
   UsesELFSectionDirectiveForBSS = true;
-
-  if (TheTriple.getOS() == llvm::Triple::Solaris)
-    UseIntegratedAssembler = true;
 }
 
 const MCExpr*

diff --git a/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp b/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
index 6561804661116a90587514edf8de7f84ba0877a8..7d93555872185e9a4d4adc473e0c8d04d48023d8 100644 (file)
--- a/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
+++ b/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
@@ -76,8 +76,6 @@ X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(const Triple &T) {
   // version in use.  From at least >= ld64-97.17 (Xcode 3.2.6) the abs-ified
   // FDE relocs may be used.
   DwarfFDESymbolsUseAbsDiff = T.isMacOSX() && !T.isMacOSXVersionLT(10, 6);
-
-  UseIntegratedAssembler = true;
 }
 
 X86_64MCAsmInfoDarwin::X86_64MCAsmInfoDarwin(const Triple &Triple)
@@ -116,10 +114,6 @@ X86ELFMCAsmInfo::X86ELFMCAsmInfo(const Triple &T) {
   if ((T.getOS() == Triple::OpenBSD || T.getOS() == Triple::Bitrig) &&
        T.getArch() == Triple::x86)
     Data64bitsDirective = 0;
-
-  // Always enable the integrated assembler by default.
-  // Clang also enabled it when the OS is Solaris but that is redundant here.
-  UseIntegratedAssembler = true;
 }
 
 const MCExpr *
@@ -150,8 +144,6 @@ X86MCAsmInfoMicrosoft::X86MCAsmInfoMicrosoft(const Triple &Triple) {
   TextAlignFillValue = 0x90;
 
   AllowAtInName = true;
-
-  UseIntegratedAssembler = true;
 }
 
 void X86MCAsmInfoGNUCOFF::anchor() { }
@@ -166,6 +158,4 @@ X86MCAsmInfoGNUCOFF::X86MCAsmInfoGNUCOFF(const Triple &Triple) {
 
   // Exceptions handling
   ExceptionsType = ExceptionHandling::DwarfCFI;
-
-  UseIntegratedAssembler = true;
 }

diff --git a/test/CodeGen/AArch64/inline-asm-constraints.ll b/test/CodeGen/AArch64/inline-asm-constraints.ll
index 365453c5fec4ca316bb6cde583f56c798ea955a4..18a3b37b41d1cced8cf5abfc3a354892f8872070 100644 (file)
--- a/test/CodeGen/AArch64/inline-asm-constraints.ll
+++ b/test/CodeGen/AArch64/inline-asm-constraints.ll
@@ -1,4 +1,4 @@
-;RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -no-integrated-as < %s | FileCheck %s
+;RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon < %s | FileCheck %s
 
 define i64 @test_inline_constraint_r(i64 %base, i32 %offset) {
 ; CHECK-LABEL: test_inline_constraint_r:

diff --git a/test/CodeGen/AArch64/inline-asm-modifiers.ll b/test/CodeGen/AArch64/inline-asm-modifiers.ll
index cb66335b105b45bd88703abb45df299b09315d1d..b7f4d3c57ba37810568ea454e478106f9ca6e06b 100644 (file)
--- a/test/CodeGen/AArch64/inline-asm-modifiers.ll
+++ b/test/CodeGen/AArch64/inline-asm-modifiers.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic -no-integrated-as < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-none-linux-gnu -relocation-model=pic < %s | FileCheck %s
 
 @var_simple = hidden global i32 0
 @var_got = global i32 0

diff --git a/test/CodeGen/ARM/2009-04-06-AsmModifier.ll b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
index a8ea6f007c7f72c3ddce98309a63c4cbe5654b03..7342f69631e684bc60925d12f09ef3734aa1ca08 100644 (file)
--- a/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
+++ b/test/CodeGen/ARM/2009-04-06-AsmModifier.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -no-integrated-as | grep "swi 107"
+; RUN: llc < %s -march=arm | grep "swi 107"
 
 define i32 @_swilseek(i32) nounwind {
 entry:

diff --git a/test/CodeGen/ARM/arm-modifier.ll b/test/CodeGen/ARM/arm-modifier.ll
index f943aea9e1d1aefb31149cb89cf95589836455e9..854864277720d65315f85ed52be6b1597e645661 100644 (file)
--- a/test/CodeGen/ARM/arm-modifier.ll
+++ b/test/CodeGen/ARM/arm-modifier.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -mattr=+vfp2 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s
 
 define i32 @foo(float %scale, float %scale2) nounwind {
 entry:

diff --git a/test/CodeGen/ARM/crash-O0.ll b/test/CodeGen/ARM/crash-O0.ll
index 8855bb99aaf991bee8fde9a6ea209fa9f7903196..8bce4e0097fa8f96627d7779797348de068ee373 100644 (file)
--- a/test/CodeGen/ARM/crash-O0.ll
+++ b/test/CodeGen/ARM/crash-O0.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -relocation-model=pic -disable-fp-elim -no-integrated-as
+; RUN: llc < %s -O0 -relocation-model=pic -disable-fp-elim
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:64-n32"
 target triple = "armv6-apple-darwin10"
 

diff --git a/test/CodeGen/ARM/inlineasm-64bit.ll b/test/CodeGen/ARM/inlineasm-64bit.ll
index d098a4383bc6884e466e02c33118c35320ae6d51..683a0c4b7d307295e10907a03958324cc5e5f4ec 100644 (file)
--- a/test/CodeGen/ARM/inlineasm-64bit.ll
+++ b/test/CodeGen/ARM/inlineasm-64bit.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O3  -mtriple=arm-linux-gnueabi -no-integrated-as | FileCheck %s
-; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs -no-integrated-as < %s | FileCheck %s
+; RUN: llc < %s -O3  -mtriple=arm-linux-gnueabi | FileCheck %s
+; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s
 ; check if regs are passing correctly
 define void @i64_write(i64* %p, i64 %val) nounwind {
 ; CHECK-LABEL: i64_write:

diff --git a/test/CodeGen/ARM/inlineasm-imm-arm.ll b/test/CodeGen/ARM/inlineasm-imm-arm.ll
index 908f093ae270c1141c1ec464ebdf456a0a6f6961..45dfcf0b82a5a56b4a6cad6bf38688b9513a4540 100644 (file)
--- a/test/CodeGen/ARM/inlineasm-imm-arm.ll
+++ b/test/CodeGen/ARM/inlineasm-imm-arm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -no-integrated-as
+; RUN: llc < %s -march=arm
 
 ; Test ARM-mode "I" constraint, for any Data Processing immediate.
 define i32 @testI(i32 %x) {

diff --git a/test/CodeGen/ARM/inlineasm3.ll b/test/CodeGen/ARM/inlineasm3.ll
index 8275cca950fdbb74f68b2c02d8016699fa676ca5..5ee3247209a7fd3c5c8fb9fe3149a66c50bb7483 100644 (file)
--- a/test/CodeGen/ARM/inlineasm3.ll
+++ b/test/CodeGen/ARM/inlineasm3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon,+v6t2 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=arm -float-abi=soft -mattr=+neon,+v6t2 | FileCheck %s
 
 ; Radar 7449043
 %struct.int32x4_t = type { <4 x i32> }

diff --git a/test/CodeGen/ARM/mult-alt-generic-arm.ll b/test/CodeGen/ARM/mult-alt-generic-arm.ll
index 05e9b0facd6c6549f1c9bdb1edf7290d98626a20..a8104db337f57cd86ff9d7aac3f06ac3e3140f7c 100644 (file)
--- a/test/CodeGen/ARM/mult-alt-generic-arm.ll
+++ b/test/CodeGen/ARM/mult-alt-generic-arm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=arm -no-integrated-as
+; RUN: llc < %s -march=arm
 ; ModuleID = 'mult-alt-generic.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
 target triple = "arm"

diff --git a/test/CodeGen/ARM/subreg-remat.ll b/test/CodeGen/ARM/subreg-remat.ll
index d5abfc0af51b76c88a4e695fc1cc65a6a8eef8f2..1bc0315354cb33e08979e72ca70c17ce906ef6ec 100644 (file)
--- a/test/CodeGen/ARM/subreg-remat.ll
+++ b/test/CodeGen/ARM/subreg-remat.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -pre-RA-sched=source -no-integrated-as | FileCheck %s
+; RUN: llc < %s -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 -pre-RA-sched=source | FileCheck %s
 target triple = "thumbv7-apple-ios"
 ; <rdar://problem/10032939>
 ;

diff --git a/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll b/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll
index 21c05f17a7c5356debb18f6a18c35c882455e1dc..339f0f71ed5abd70aaa3017b3c94913206d73876 100644 (file)
--- a/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll
+++ b/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s
+; RUN: llc < %s
 ; XFAIL: sparc-sun-solaris2
 ; PR1308
 ; PR1557

diff --git a/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll b/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
index 0f82ba61b28821afb74277c10afe4c2deb7f9316..af522dc4c58d1f6e4238c4c0a0538e3e446f46a7 100644 (file)
--- a/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
+++ b/test/CodeGen/Generic/2007-04-27-InlineAsm-X-Dest.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s
+; RUN: llc < %s
 
 ; Test that we can have an "X" output constraint.
 

diff --git a/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll b/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll
index 05989a0836cf56ed536c61ecbdc988190040275e..f2c9b7f849b6fe591963a8209961be5682617562 100644 (file)
--- a/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll
+++ b/test/CodeGen/Generic/2007-04-27-LargeMemObject.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s
+; RUN: llc < %s
 
         %struct..0anon = type { [100 x i32] }
 

diff --git a/test/CodeGen/Generic/2008-02-20-MatchingMem.ll b/test/CodeGen/Generic/2008-02-20-MatchingMem.ll
index 5ddb515bb75a185624bf1702655f7f63e2f88740..7ffb734c713a8f2395bfdcae4d8c29fc20e15d70 100644 (file)
--- a/test/CodeGen/Generic/2008-02-20-MatchingMem.ll
+++ b/test/CodeGen/Generic/2008-02-20-MatchingMem.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s
+; RUN: llc < %s
 ; PR1133
 ; XFAIL: hexagon
 define void @test(i32* %X) nounwind  {

diff --git a/test/CodeGen/Generic/asm-large-immediate.ll b/test/CodeGen/Generic/asm-large-immediate.ll
index 67a7a1e75a8343c91121634a034b1a71dbe75f01..891bbc9cc16de062cb9da3e54c5de23d45967fd1 100644 (file)
--- a/test/CodeGen/Generic/asm-large-immediate.ll
+++ b/test/CodeGen/Generic/asm-large-immediate.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
 
 define void @test() {
 entry:

diff --git a/test/CodeGen/Generic/inline-asm-mem-clobber.ll b/test/CodeGen/Generic/inline-asm-mem-clobber.ll
index 5aa827a0ab884b966648a249c7959e19b6972121..e523d031dc6565331fde136a84a107aa45a2490f 100644 (file)
--- a/test/CodeGen/Generic/inline-asm-mem-clobber.ll
+++ b/test/CodeGen/Generic/inline-asm-mem-clobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -O2 < %s | FileCheck %s
 
 @G = common global i32 0, align 4
 

diff --git a/test/CodeGen/Generic/inline-asm-special-strings.ll b/test/CodeGen/Generic/inline-asm-special-strings.ll
index 5ef568863baddc4cb1ecb127a76b4599997e6909..d18221ef934dab4f9185fcac1408129ee9cb4c65 100644 (file)
--- a/test/CodeGen/Generic/inline-asm-special-strings.ll
+++ b/test/CodeGen/Generic/inline-asm-special-strings.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | grep "foo 0 0"
+; RUN: llc < %s | grep "foo 0 0"
 
 define void @bar() nounwind {
        tail call void asm sideeffect "foo ${:uid} ${:uid}", ""() nounwind

diff --git a/test/CodeGen/Generic/mature-mc-support.ll b/test/CodeGen/Generic/mature-mc-support.ll
deleted file mode 100644 (file)
index 719e411..0000000
--- a/test/CodeGen/Generic/mature-mc-support.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; Test that inline assembly is parsed by the MC layer when MC support is mature
-; (even when the output is assembly).
-
-; RUN: not llc -march=aarch64 < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=aarch64 -filetype=obj < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=arm < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=arm -filetype=obj < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=thumb < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=thumb -filetype=obj < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=x86 < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=x86 -filetype=obj < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=x86-64 < %s 2>&1 | FileCheck %s
-; RUN: not llc -march=x86-64 -filetype=obj < %s 2>&1 | FileCheck %s
-
-module asm "   .this_directive_is_very_unlikely_to_exist"
-
-; CHECK: LLVM ERROR: Error parsing inline asm

diff --git a/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
index 5eb6e37574716d1bf3e7cb0387a66a5a6bc7f3c7..73736c57fea6002d26b8d434f374024deb564ca1 100644 (file)
--- a/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
+++ b/test/CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "foo r3, r4"
-; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 -no-integrated-as | grep "bari r3, 47"
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep "foo r3, r4"
+; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin8.8.0 | grep "bari r3, 47"
 
 ; PR1351
 

diff --git a/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll b/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
index 490aa0c1442c16106882386dd6376af3a202c55b..1df51406fac99f57f288b7babebcc69e44e7b19f 100644 (file)
--- a/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
+++ b/test/CodeGen/PowerPC/2007-05-03-InlineAsm-S-Constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s
+; RUN: llc < %s
 ; PR1382
 
 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"

diff --git a/test/CodeGen/Thumb/inlineasm-imm-thumb.ll b/test/CodeGen/Thumb/inlineasm-imm-thumb.ll
index d557b9d5a1f66f9960090a83d8b8fbeeaa443fe6..5c8a52af59e4bfc1cdc77a93d615da365f126bf9 100644 (file)
--- a/test/CodeGen/Thumb/inlineasm-imm-thumb.ll
+++ b/test/CodeGen/Thumb/inlineasm-imm-thumb.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=thumb -no-integrated-as
+; RUN: llc < %s -march=thumb
 
 ; Test Thumb-mode "I" constraint, for ADD immediate.
 define i32 @testI(i32 %x) {

diff --git a/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/test/CodeGen/X86/2006-07-20-InlineAsm.ll
index 1facf15b9f404ee8f5f58070f888a8480a49c42f..cac47cdab6deed5750a190f36dc21d9b218ed79d 100644 (file)
--- a/test/CodeGen/X86/2006-07-20-InlineAsm.ll
+++ b/test/CodeGen/X86/2006-07-20-InlineAsm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -march=x86
 ; PR833
 
 @G = weak global i32 0         ; <i32*> [#uses=3]

diff --git a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
index 2a9c8324d36a5ed4b2b355fb8e3fb83efd1de0a3..c4b08a3be2832f0bf9c360a2d2e549ecea595d96 100644 (file)
--- a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
+++ b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
@@ -1,5 +1,5 @@
 ; PR850
-; RUN: llc < %s -march=x86 -x86-asm-syntax=att -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=x86 -x86-asm-syntax=att | FileCheck %s
 
 ; CHECK: {{movl 4[(]%eax[)],%ebp}}
 ; CHECK: {{movl 0[(]%eax[)], %ebx}}

diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
index 93fb344cbb1de582522d88535e518735cc7a3c3e..3b2e443d7d4ef48d82dfd324a76ec4a48443503e 100644 (file)
--- a/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
+++ b/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as | grep "mov %gs:72, %eax"
+; RUN: llc < %s -march=x86 | grep "mov %gs:72, %eax"
 target datalayout = "e-p:32:32"
 target triple = "i686-apple-darwin9"
 

diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
index 6cf8bf90611c644bab3bcdb485747a859757d4c2..366f5830392d7e054f0920ff17a1390bf17da80e 100644 (file)
--- a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
+++ b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=yonah -march=x86 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mcpu=yonah -march=x86 | FileCheck %s
 
 target datalayout = "e-p:32:32"
 target triple = "i686-apple-darwin9"

diff --git a/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
index d02346d103c1438cf92b473c5b36375d1eb4421e..984094d86a2750779ed13715727b85b1a659ab30 100644 (file)
--- a/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
+++ b/test/CodeGen/X86/2007-10-28-inlineasm-q-modifier.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s
+; RUN: llc < %s
 ; PR1748
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 target triple = "x86_64-unknown-linux-gnu"

diff --git a/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
index ec3bce9c666af82d861ec2d67231f62582b2eef3..6b871aa3a4d4f1ae60c6eb6e0756b4aae2d43d91 100644 (file)
--- a/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
+++ b/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
 ; PR1767
 
 define void @xor_sse_2(i64 %bytes, i64* %p1, i64* %p2) {

diff --git a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
index d1699d5571131c2b484e010bc371b48179d5ad8e..c4670242b531e997f395f10292db0cc02ab83bf1 100644 (file)
--- a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
+++ b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
+; RUN: llc < %s -relocation-model=static | FileCheck %s
 ; PR1761
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 target triple = "x86_64-pc-linux"

diff --git a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
index 319e884139aee26d6f0f374b6b677027ad0bff9e..b06b249a63260a887566145d85a741f6566bfd47 100644 (file)
--- a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
+++ b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
 ; PR2078
 ; The clobber list says that "ax" is clobbered.  Make sure that eax isn't 
 ; allocated to the input/output register.

diff --git a/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
index 11b55a6e5ac74519a578faa308d9bbc5fe921cb1..0b4eb3a3b9b206d80e57297becdfc4a57b69ca8d 100644 (file)
--- a/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
+++ b/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -march=x86
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
 target triple = "i386-pc-linux-gnu"

diff --git a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
index 6d45f1f00301a7f2224a203281a1d603086990c8..d4805b4bb63e7ce55b0100a0519db96e35fec2cd 100644 (file)
--- a/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
+++ b/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
 ; rdar://5720231
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i386-apple-darwin8"

diff --git a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
index f4a43a1e978a21204d4b82b8a5e92c9fd933ba9f..5c2fbeee5c7058142a256edaa077b13a2b60f022 100644 (file)
--- a/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
+++ b/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
-; RUN: llc < %s -march=x86 -regalloc=basic -no-integrated-as      | FileCheck %s
-; RUN: llc < %s -march=x86 -regalloc=greedy -no-integrated-as     | FileCheck %s
+; RUN: llc < %s -march=x86 -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc < %s -march=x86 -regalloc=basic      | FileCheck %s
+; RUN: llc < %s -march=x86 -regalloc=greedy     | FileCheck %s
 
 ; The 1st, 2nd, 3rd and 5th registers must all be different.  The registers
 ; referenced in the 4th and 6th operands must not be the same as the 1st or 5th

diff --git a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
index 2b2f704349b6743f5cb14cc827109b78da9b4d74..b2e6061ff91cb7e28680aaaf6b82670cfa52f400 100644 (file)
--- a/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
+++ b/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
-; RUN: llc < %s -march=x86-64 -no-integrated-as
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
 
 define void @test(i64 %x) nounwind {
 entry:

diff --git a/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
index e23dfe5a6a1d0d588a4a763dd0ce22d2409ac305..353d1c75216b35daa95cfdf38952ef23adeba61b 100644 (file)
--- a/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
+++ b/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
-; RUN: llc < %s -march=x86-64 -no-integrated-as
+; RUN: llc < %s -march=x86
+; RUN: llc < %s -march=x86-64
 
 ; from gcc.c-torture/compile/920520-1.c
 

diff --git a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
index 5004f04bf8fdaf70f177acb52fb9b4ac83eb063d..75496518afa6a72ed16c63e8597a5351112689e4 100644 (file)
--- a/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
+++ b/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=x86 | FileCheck %s
 
 ; ModuleID = 'shant.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"

diff --git a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
index bd1b47a588ef4c68310d607ea85e19a8fc9dfef1..3d70b58686b18d08669c23d5c3c74d6694f988e9 100644 (file)
--- a/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
+++ b/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -no-integrated-as
+; RUN: llc < %s -mtriple=i386-apple-darwin
 ; rdar://6781755
 ; PR3934
 

diff --git a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
index fa240f64c3009d91189c963f497c57008dd625c5..7468acb95f11b2712d6c98f77487ab79000138ff 100644 (file)
--- a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
+++ b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
+; RUN: llc < %s -relocation-model=static | FileCheck %s
 ; PR4152
 
 ; CHECK: {{1: ._pv_cpu_ops[+]8}}

diff --git a/test/CodeGen/X86/2009-09-19-earlyclobber.ll b/test/CodeGen/X86/2009-09-19-earlyclobber.ll
index 7df62fd8c37ae2d1a69ccd3e6635a57ff540280b..66f51180509f0159502f65732adb2becfd201ff0 100644 (file)
--- a/test/CodeGen/X86/2009-09-19-earlyclobber.ll
+++ b/test/CodeGen/X86/2009-09-19-earlyclobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | FileCheck %s
+; RUN: llc < %s | FileCheck %s
 ; ModuleID = '4964.c'
 ; PR 4964
 ; Registers other than RAX, RCX are OK, but they must be different.

diff --git a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
index 5c10c55ea3ee738d4fa1b823c5696df8bed64fde..b1664470551b6a6fbc535a1121e96be2a38dc534 100644 (file)
--- a/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
+++ b/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
 ; pr5391
 
 define void @t() nounwind ssp {

diff --git a/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll b/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
index fc8c895af5b4f6b30a51e57390a3a1c164852de3..74a5ec28db1eabc82ce3e499a6a1d580b7281f93 100644 (file)
--- a/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
+++ b/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -regalloc=fast -no-integrated-as | FileCheck %s
+; RUN: llc < %s -O0 -regalloc=fast | FileCheck %s
 ; PR6520
 
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"

diff --git a/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll b/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
index 0f8855d1267ed5dc8461a3b3dc3f5806ede766e7..9b47bb75bf16e41a12ffdec5a2926d16cb51f7f9 100644 (file)
--- a/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
+++ b/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -regalloc=fast -optimize-regalloc=0 < %s | FileCheck %s
 ; PR7382
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-unknown-linux-gnu"

diff --git a/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll b/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
index 0df9dc1cb769fab44f01192d2a7f669fe3dd3346..68a6a134de5c2733bc9669f719e58da8e0d7246e 100644 (file)
--- a/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
+++ b/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32 -no-integrated-as
+; RUN: llc < %s -disable-fp-elim -mtriple=i686-pc-mingw32
 
 %struct.__SEH2Frame = type {}
 

diff --git a/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll b/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
index d7bc21f6393a48687f6a09f8f344f469e1c70691..e1491a03d8a86f17fbcd09930c77a6930c003f8c 100644 (file)
--- a/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
+++ b/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -O0 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=x86 -O0 | FileCheck %s
 ; PR7509
 target triple = "i386-apple-darwin10"
 %asmtype = type { i32, i8*, i32, i32 }

diff --git a/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
index a0798ae10d7cbac186afed5c54005eddf529b5e3..82dac9d9930e6e74f0428d452397639382f67ae3 100644 (file)
--- a/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
+++ b/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s
 ; Any register is OK for %0, but it must be a register, not memory.
 
 define i32 @foo() nounwind ssp {

diff --git a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
index 4302adda5151d2d4f83a7f2495ab9f28796fe489..0bbb24f6ecdf33b9f375da3a2f7f3a2514a9cc32 100644 (file)
--- a/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
+++ b/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
 
 define void @foo() nounwind ssp {
 entry:

diff --git a/test/CodeGen/X86/2010-07-06-asm-RIP.ll b/test/CodeGen/X86/2010-07-06-asm-RIP.ll
index 818bbc6a5bc0dfa28272e633128dd5762caa1087..9526b8d4cdc781066dcf573865cae64a38d2f2c7 100644 (file)
--- a/test/CodeGen/X86/2010-07-06-asm-RIP.ll
+++ b/test/CodeGen/X86/2010-07-06-asm-RIP.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
 ; PR 4752
 
 @n = global i32 0                                 ; <i32*> [#uses=2]

diff --git a/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll b/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
index 306e22ae5f15b9310c867eb5b0b1b9b2f800db4f..97cbe3ea5a02d3246297076d818955b8c7e2d9d1 100644 (file)
--- a/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
+++ b/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
 ; PR 7528
 ; formerly crashed
 

diff --git a/test/CodeGen/X86/2011-10-11-SpillDead.ll b/test/CodeGen/X86/2011-10-11-SpillDead.ll
index 19c3d6ca727e9753582b70514bd2b237b9ab0916..8e70d6543ac862fa8d427497487761ca027d6aa4 100644 (file)
--- a/test/CodeGen/X86/2011-10-11-SpillDead.ll
+++ b/test/CodeGen/X86/2011-10-11-SpillDead.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-regalloc -no-integrated-as
+; RUN: llc < %s -verify-regalloc
 ; PR11125
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.7"

diff --git a/test/CodeGen/X86/asm-block-labels.ll b/test/CodeGen/X86/asm-block-labels.ll
index 6dbfb16a6d502d6f89f86332855f61469fb5688b..a43d43023196d981298f4034c8bd8a079d0c02bc 100644 (file)
--- a/test/CodeGen/X86/asm-block-labels.ll
+++ b/test/CodeGen/X86/asm-block-labels.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -std-compile-opts | llc -no-integrated-as
+; RUN: opt < %s -std-compile-opts | llc
 ; ModuleID = 'block12.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
 target triple = "i686-apple-darwin8"

diff --git a/test/CodeGen/X86/asm-global-imm.ll b/test/CodeGen/X86/asm-global-imm.ll
index 9e79f6f782226f88602821f85a74380923b7a823..ebf585a39a286e4bf6598879479882979a61e872 100644 (file)
--- a/test/CodeGen/X86/asm-global-imm.ll
+++ b/test/CodeGen/X86/asm-global-imm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -relocation-model=static -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=x86 -relocation-model=static | FileCheck %s
 ; PR882
 
 target datalayout = "e-p:32:32"

diff --git a/test/CodeGen/X86/cas.ll b/test/CodeGen/X86/cas.ll
index ec519c646f69c9d96096136402ab0a40ff0aa240..c2dd05ef7302fffb82ae6184ceb00b486bd07bab 100644 (file)
--- a/test/CodeGen/X86/cas.ll
+++ b/test/CodeGen/X86/cas.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s
+; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - | FileCheck %s
 
 ; C code this came from
 ;bool cas(float volatile *p, float *expected, float desired) {

diff --git a/test/CodeGen/X86/fast-isel.ll b/test/CodeGen/X86/fast-isel.ll
index bc79184216032c1c68542628914df32fc7a6988a..132df2b0ab43d87820be06d391527762418f4858 100644 (file)
--- a/test/CodeGen/X86/fast-isel.ll
+++ b/test/CodeGen/X86/fast-isel.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2 -no-integrated-as
-; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as
+; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -march=x86 -mattr=sse2
+; RUN: llc < %s -fast-isel -fast-isel-abort -verify-machineinstrs -mtriple=x86_64-apple-darwin10
 
 ; This tests very minimal fast-isel functionality.
 

diff --git a/test/CodeGen/X86/fold-xmm-zero.ll b/test/CodeGen/X86/fold-xmm-zero.ll
index c92d45c35ae9373946984d6d8baeff76d60bfd95..b4eeb40983847481c58134d0a3d136024c199d55 100644 (file)
--- a/test/CodeGen/X86/fold-xmm-zero.ll
+++ b/test/CodeGen/X86/fold-xmm-zero.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 | FileCheck %s
 
 ; Simple test to make sure folding for special constants (like float zero)
 ; isn't completely broken.

diff --git a/test/CodeGen/X86/inline-asm-flag-clobber.ll b/test/CodeGen/X86/inline-asm-flag-clobber.ll
index bb7c33e422ed1387b52b7351830fe55b93f41c51..45f4d2f38a4696e39eb0810b945460ab216e1b8e 100644 (file)
--- a/test/CodeGen/X86/inline-asm-flag-clobber.ll
+++ b/test/CodeGen/X86/inline-asm-flag-clobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86-64 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -march=x86-64 < %s | FileCheck %s
 ; PR3701
 
 define i64 @t(i64* %arg) nounwind {

diff --git a/test/CodeGen/X86/inline-asm-fpstack.ll b/test/CodeGen/X86/inline-asm-fpstack.ll
index 91c477baaa51f48dafa8c7aa1f35139993f61bfd..e83c065632dc7622da0e74bb0badd1c03571976d 100644 (file)
--- a/test/CodeGen/X86/inline-asm-fpstack.ll
+++ b/test/CodeGen/X86/inline-asm-fpstack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin | FileCheck %s
 
 ; There should be no stack manipulations between the inline asm and ret.
 ; CHECK: test1

diff --git a/test/CodeGen/X86/inline-asm-h.ll b/test/CodeGen/X86/inline-asm-h.ll
index 8c3e45aba9037e8b0a67159558700a903face7da..53cf419bd11affb6ad76aa4abc801333ee4a394d 100644 (file)
--- a/test/CodeGen/X86/inline-asm-h.ll
+++ b/test/CodeGen/X86/inline-asm-h.ll
@@ -9,4 +9,4 @@ entry:
 }
 
 ; CHECK: zed
-; CHECK: movq %mm2, foobar+8(%rip)
+; CHECK: movq %mm2,foobar+8(%rip)

diff --git a/test/CodeGen/X86/inline-asm-modifier-n.ll b/test/CodeGen/X86/inline-asm-modifier-n.ll
index 072c7c4195360e2f6f83d45adf4fb060ac9ce739..b069c463189912a7b54084b8e0ce273cdf1554c1 100644 (file)
--- a/test/CodeGen/X86/inline-asm-modifier-n.ll
+++ b/test/CodeGen/X86/inline-asm-modifier-n.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as | grep " 37"
+; RUN: llc < %s -march=x86 | grep " 37"
 ; rdar://7008959
 
 define void @bork() nounwind {

diff --git a/test/CodeGen/X86/inline-asm-mrv.ll b/test/CodeGen/X86/inline-asm-mrv.ll
index a96e7b818072a3488c5e26c5d638cddd0b26fac3..733205d6a91534a06091a3f750fbc60f1da90906 100644 (file)
--- a/test/CodeGen/X86/inline-asm-mrv.ll
+++ b/test/CodeGen/X86/inline-asm-mrv.ll
@@ -1,8 +1,8 @@
 ; PR2094
-; RUN: llc < %s -march=x86-64 -no-integrated-as | grep movslq
-; RUN: llc < %s -march=x86-64 -no-integrated-as | grep addps
-; RUN: llc < %s -march=x86-64 -no-integrated-as | grep paddd
-; RUN: llc < %s -march=x86-64 -no-integrated-as | not grep movq
+; RUN: llc < %s -march=x86-64 | grep movslq
+; RUN: llc < %s -march=x86-64 | grep addps
+; RUN: llc < %s -march=x86-64 | grep paddd
+; RUN: llc < %s -march=x86-64 | not grep movq
 
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 target triple = "x86_64-apple-darwin8"

diff --git a/test/CodeGen/X86/inline-asm-q-regs.ll b/test/CodeGen/X86/inline-asm-q-regs.ll
index 53a56aee2cb3858e38367f7115580e1fec57930f..fca68baac6ef308d21b8d9551fa09f01d9574916 100644 (file)
--- a/test/CodeGen/X86/inline-asm-q-regs.ll
+++ b/test/CodeGen/X86/inline-asm-q-regs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -mattr=+avx -no-integrated-as
+; RUN: llc < %s -march=x86-64 -mattr=+avx
 ; rdar://7066579
 
        %0 = type { i64, i64, i64, i64, i64 }           ; type %0

diff --git a/test/CodeGen/X86/inline-asm-stack-realign3.ll b/test/CodeGen/X86/inline-asm-stack-realign3.ll
index 3baaaaa7d93d14e5d58e2b13eb0a1f88dbbd123a..cdb77ca3ea303e71ea6900592f2fcb0775725f5b 100644 (file)
--- a/test/CodeGen/X86/inline-asm-stack-realign3.ll
+++ b/test/CodeGen/X86/inline-asm-stack-realign3.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=x86 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -march=x86 < %s | FileCheck %s
 
 declare void @bar(i32* %junk)
 

diff --git a/test/CodeGen/X86/inline-asm-tied.ll b/test/CodeGen/X86/inline-asm-tied.ll
index fb5896b0ad6dcea2145d85b7b25b4e7a4445497c..597236e36281ef89071f160dc276b1b4e2257555 100644 (file)
--- a/test/CodeGen/X86/inline-asm-tied.ll
+++ b/test/CodeGen/X86/inline-asm-tied.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic -no-integrated-as | FileCheck %s
+; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic | FileCheck %s
 ; rdar://6992609
 
 ; CHECK: movl [[EDX:%e..]], 4(%esp)

diff --git a/test/CodeGen/X86/inline-asm-x-scalar.ll b/test/CodeGen/X86/inline-asm-x-scalar.ll
index 64a7fe82647244e3825dc89133ad21e296f30d5a..5a9628b3df74a2be45cdd82e559f332898c8fd0b 100644 (file)
--- a/test/CodeGen/X86/inline-asm-x-scalar.ll
+++ b/test/CodeGen/X86/inline-asm-x-scalar.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=yonah -no-integrated-as
+; RUN: llc < %s -march=x86 -mcpu=yonah
 
 define void @test1() {
         tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000)

diff --git a/test/CodeGen/X86/inline-asm.ll b/test/CodeGen/X86/inline-asm.ll
index 5ec4f469df8939ed2ad06f99cf67718edd6cc550..f12c2600fff3e9ab8f9b4b0931f02a391ec185cb 100644 (file)
--- a/test/CodeGen/X86/inline-asm.ll
+++ b/test/CodeGen/X86/inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -march=x86
 
 define i32 @test1() nounwind {
        ; Dest is AX, dest type = i32.

diff --git a/test/CodeGen/X86/ms-inline-asm.ll b/test/CodeGen/X86/ms-inline-asm.ll
index 69105158906f2e09aa1a724c4e1471a3e338502f..436d34a115583f4e63fd216fc7ef09299e8623cc 100644 (file)
--- a/test/CodeGen/X86/ms-inline-asm.ll
+++ b/test/CodeGen/X86/ms-inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mcpu=core2 -no-integrated-as | FileCheck %s
+; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s
 
 define i32 @t1() nounwind {
 entry:

diff --git a/test/CodeGen/X86/mult-alt-generic-i686.ll b/test/CodeGen/X86/mult-alt-generic-i686.ll
index 54bc3a42f035a718fc19e09ad03388496ff1ab53..7c3499f178a6970e376db6a0388502698a4a5b9f 100644 (file)
--- a/test/CodeGen/X86/mult-alt-generic-i686.ll
+++ b/test/CodeGen/X86/mult-alt-generic-i686.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -no-integrated-as
+; RUN: llc < %s -march=x86
 ; ModuleID = 'mult-alt-generic.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
 target triple = "i686"

diff --git a/test/CodeGen/X86/mult-alt-generic-x86_64.ll b/test/CodeGen/X86/mult-alt-generic-x86_64.ll
index 84a9c8140943ec82613125b6532fb3e4da844c6c..f35bb5e340799a2906fe5510a26acf6dbb212cca 100644 (file)
--- a/test/CodeGen/X86/mult-alt-generic-x86_64.ll
+++ b/test/CodeGen/X86/mult-alt-generic-x86_64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86-64 -no-integrated-as
+; RUN: llc < %s -march=x86-64
 ; ModuleID = 'mult-alt-generic.c'
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64"

diff --git a/test/CodeGen/X86/mult-alt-x86.ll b/test/CodeGen/X86/mult-alt-x86.ll
index cb2219a6ed754bdd970ed8f044440dd8f64e548b..06175da464545a06e19ed0206153c2e4266e6c54 100644 (file)
--- a/test/CodeGen/X86/mult-alt-x86.ll
+++ b/test/CodeGen/X86/mult-alt-x86.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 -no-integrated-as
+; RUN: llc < %s -march=x86 -mattr=+sse2
 ; ModuleID = 'mult-alt-x86.c'
 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
 target triple = "i686-pc-win32"

diff --git a/test/CodeGen/X86/multiple-loop-post-inc.ll b/test/CodeGen/X86/multiple-loop-post-inc.ll
index 4edc1ff0b3fa7cdfa16bd9f7fa885434d1ff5d39..29b9f34464f0c4d3c58ee583b9d756b8fbfdda7c 100644 (file)
--- a/test/CodeGen/X86/multiple-loop-post-inc.ll
+++ b/test/CodeGen/X86/multiple-loop-post-inc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
+; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s
 ; rdar://7236213
 ;
 ; The scheduler's 2-address hack has been disabled, so there is

diff --git a/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll b/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll
index 598ea0e354e15e768b2204cea075f0560d660d6d..9d82819f9db4a2fd88d2ef768ce8e1c8b5e561d0 100644 (file)
--- a/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll
+++ b/test/Transforms/BranchFolding/2007-10-19-InlineAsmDirectives.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -std-compile-opts -o - | llc -no-integrated-as -o - | grep bork_directive | wc -l | grep 2
+; RUN: opt < %s -std-compile-opts -o - | llc -o - | grep bork_directive | wc -l | grep 2
 
 ;; We don't want branch folding to fold asm directives.