Add explicit link targets to some headers in LangRef.rst
[oota-llvm.git] / test /
2013-06-07 Quentin ColombetTeach AsmPrinter how to print odd constants.
2013-06-07 Roman DivackyFix a typo in asm string of BP* family of instructions...
2013-06-07 Rafael EspindolaSupport OpenBSD's native frame protection conventions.
2013-06-07 Michael Gottesman[objc-arc] Ensure that the cfg path count does not...
2013-06-07 Venkatraman Govind... [Sparc]: Use cmp instruction instead of subcc to compar...
2013-06-06 Kevin EnderbyMove the test for the data in code into the ARM directo...
2013-06-06 Rafael EspindolaAdd a testcase from pr16244.
2013-06-06 Kevin EnderbyTeach llvm-objdump with the -macho parser how to use...
2013-06-06 Rafael EspindolaPrint symbol names in relocations when dumping COFF...
2013-06-05 Vincent LejeuneR600: Add a pass that merge Vector Register
2013-06-05 Rafael EspindolaDon't hide the first ELF symbol.
2013-06-05 Vincent LejeuneR600: Schedule copy from phys register at beginning...
2013-06-05 Akira Hatanaka[mips] brcond + setgt/setugt instruction selection...
2013-06-05 Michael Liao[PATCH] Fix VGATHER* operand constraints
2013-06-05 Mihai PopaThis is a simple patch that changes RRX and RRXS to...
2013-06-05 David BlaikiePR15662: Optimized debug info produces out of order...
2013-06-05 Tom StellardR600: Make sure to schedule AR register uses and defs...
2013-06-05 Rafael EspindolaDon't print default values for NumberOfAuxSymbols and...
2013-06-05 Rafael EspindolaRevert "R600: Add a pass that merge Vector Register"
2013-06-05 Rafael EspindolaHandle relocations that don't point to symbols.
2013-06-04 Vincent LejeuneR600: Add a pass that merge Vector Register
2013-06-04 Vincent LejeuneR600: Const/Neg/Abs can be folded to dot4
2013-06-04 Evan ChengCortex-R5 can issue Thumb2 integer division instructions.
2013-06-04 David MajnemerIndVarSimplify: check if loop invariant expansion can...
2013-06-04 David MajnemerARM: Fix crash in ARM backend inside of ARMConstantIsla...
2013-06-04 Vincent LejeuneR600: Swizzle texture/export instructions
2013-06-04 Vincent LejeuneR600: Add a test for r183108
2013-06-04 Rafael EspindolaSecond part of pr16069
2013-06-04 Alexey Samsonov[llvm-symbolizer] Avoid calling slow getSymbolSize...
2013-06-03 David MajnemerSimplifyCFG: Do not transform PHI to select if doing...
2013-06-03 Rafael EspindolaEnable mcjit tests on ppc64 when building with cmake.
2013-06-03 Tom StellardR600/SI: Add support for work item and work group intri...
2013-06-03 Tom StellardR600/SI: Add a calling convention for compute shaders
2013-06-03 Tom StellardR600/SI: Custom lower i64 sign_extend
2013-06-03 Tom StellardR600/SI: Add support for global loads
2013-06-03 Vincent LejeuneR600: use capital letter for PV channel
2013-06-03 Alexey SamsonovCorrect handling invalid filename in llvm-symbolizer
2013-06-03 Venkatraman Govind... Sparc: Add support for indirect branch and blockaddress...
2013-06-03 Rui Ueyama[Object/COFF] Fix Windows .lib name handling.
2013-06-03 Venkatraman Govind... Sparc: When storing 0, use %g0 directly in the store...
2013-06-02 Venkatraman Govind... Sparc: Combine add/or/sethi instruction with restore...
2013-06-02 Venkatraman Govind... Sparc: Perform leaf procedure optimization by default
2013-06-01 Nick LewyckyWhen determining the new index for an insertelement...
2013-06-01 Venkatraman Govind... Sparc: Mark functions calling llvm.vastart and llvm...
2013-06-01 Tim NorthoverDisable new legacy JIT test on ARM.
2013-06-01 Tim NorthoverRevert r183069: "TMP: LEA64_32r fixing"
2013-06-01 Tim NorthoverTMP: LEA64_32r fixing
2013-06-01 Tim NorthoverX86: change MOV64ri64i32 into MOV32ri64
2013-06-01 Venkatraman Govind... [Sparc] Generate correct code for leaf functions with...
2013-05-31 Andrew TrickPrevent loop-unroll from making assumptions about undef...
2013-05-31 Eric ChristopherTemporarily Revert "X86: change MOV64ri64i32 into MOV32...
2013-05-31 Arnold SchwaighoferLoopVectorize: PHIs with only outside users should...
2013-05-31 Quentin ColombetModify how the formulae are rated in Loop Strength...
2013-05-31 Andrew TrickUnit test for SCEV fix r182989, PR16130.
2013-05-31 Tim NorthoverARM: permit upper-case BE/LE on setend instruction
2013-05-31 Tim NorthoverARM: add fstmx and fldmx instructions for assembly
2013-05-31 Rafael EspindolaSimplify multiplications by vectors whose elements...
2013-05-31 Tim NorthoverARM: fix VEXT encoding corner case
2013-05-31 Richard Sandiford[SystemZ] Don't use LOAD and STORE REVERSED for volatil...
2013-05-31 Justin Holewinski[NVPTX] Re-enable support for virtual registers in...
2013-05-31 Evgeniy Stepanov[msan] Handle mixed track-origins and keep-going settin...
2013-05-31 Tim NorthoverX86: change MOV64ri64i32 into MOV32ri64
2013-05-31 Akira Hatanaka[mips] Big-endian code generation for atomic instructions.
2013-05-31 Nick LewyckyReapply with r182909 with a fix to the calculation...
2013-05-30 Rafael EspindolaRevert r182937 and r182877.
2013-05-30 Rafael EspindolaDon't use fast isel on this test.
2013-05-30 Benjamin KramerForce a triple so we don't get bitten by windows' diffe...
2013-05-30 Benjamin KramerForce fragile test to the atom scheduler model.
2013-05-30 Tim NorthoverX86: allow registers 8-15 in test
2013-05-30 Tim NorthoverX86: use sub-register sequences for MOV*r0 operations
2013-05-30 Justin Holewinski[NVPTX] Fix case where a sext load of an i1 type may...
2013-05-30 Richard Sandiford[SystemZ] Enable unaligned accesses
2013-05-30 Evgeniy StepanovRevert r182909.
2013-05-30 Nick LewyckySwizzle vector inputs if it helps us eliminate shuffles.
2013-05-30 Rafael EspindolaChange how we iterate over relocations on ELF.
2013-05-30 Bill WendlingThis testcase tests command line attributes which we...
2013-05-29 Andrew TrickOrder CALLSEQ_START and CALLSEQ_END nodes.
2013-05-29 JF BastienEnable FastISel on ARM for Linux and NaCl
2013-05-29 Tim NorthoverTeach ReMaterialization to be more cunning about subreg...
2013-05-29 Manman RenLTO+Debug Info: revert r182791.
2013-05-29 Richard Sandiford[SystemZ] Two tests missing from previous commit
2013-05-29 Richard Sandiford[SystemZ] Immediate compare-and-branch support
2013-05-29 Benjamin KramerMove test that depends on the X86 backend into the...
2013-05-29 Venkatraman Govind... [Sparc] Add support for leaf functions in sparc backend.
2013-05-28 Jack CarterMips assembler: Improve set register alias handling
2013-05-28 Paul RedmondAdd support for llvm.vectorizer metadata
2013-05-28 Tim NorthoverARM: use pristine object file while processing relocations
2013-05-28 Manman RenLTO+Debug Info: correctly emit inlined_subroutine when...
2013-05-28 James MolloyExtend RemapInstruction and friends to take an optional...
2013-05-28 Evgeniy Stepanov[msan] Fix argument shadow alignment.
2013-05-28 Richard Sandiford[SystemZ] Register compare-and-branch support
2013-05-28 Michael KupersteinMake BasicAliasAnalysis recognize the fact a noalias...
2013-05-27 Preston GurdConvert sqrt functions into sqrt instructions when...
2013-05-27 Rafael EspindolaAdd a cpu to try to bring back the atom bots.
2013-05-26 Hal FinkelPrefer to duplicate PPC Altivec loads when expanding...
2013-05-26 Andrew TrickFix PR16143: Insert DEBUG_VALUE before terminator.
2013-05-25 Cameron ZwarichAdd support for DWARF line number table entries for...
2013-05-25 Hal FinkelPPC: Combine duplicate (offset) lvsl Altivec intrinsics
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 4/4.
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 3/4.
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