ARM: Fix crash in ARM backend inside of ARMConstantIslandPass
authorDavid Majnemer <david.majnemer@gmail.com>
Tue, 4 Jun 2013 17:46:15 +0000 (17:46 +0000)
committerDavid Majnemer <david.majnemer@gmail.com>
Tue, 4 Jun 2013 17:46:15 +0000 (17:46 +0000)
The ARM backend did not expect LDRBi12 to hold a constant pool operand.
Allow for LLVM to deal with the instruction similar to how it deals with
LDRi12.

This fixes PR16215.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183238 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMConstantIslandPass.cpp
test/CodeGen/ARM/load-address-masked.ll [new file with mode: 0644]

index 7c16ce78ff2ad156a3b6c6fc44a1c52ca1e33338..cff5ce27bca600d8cde6835df0efcfa331b87358 100644 (file)
@@ -753,6 +753,7 @@ initializeFunctionInfo(const std::vector<MachineInstr*> &CPEMIs) {
             Scale = 4;
             break;
 
+          case ARM::LDRBi12:
           case ARM::LDRi12:
           case ARM::LDRcp:
           case ARM::t2LDRpci:
diff --git a/test/CodeGen/ARM/load-address-masked.ll b/test/CodeGen/ARM/load-address-masked.ll
new file mode 100644 (file)
index 0000000..43c98e4
--- /dev/null
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -verify-machineinstrs | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
+target triple = "armv4t-unknown-linux-gnueabi"
+
+@a = global i32 0, align 4
+
+define i32 @foo() {
+entry:
+  ret i32 and (i32 ptrtoint (i32* @a to i32), i32 255)
+}
+
+; CHECK: foo:
+; CHECK: ldrb    r0, .LCPI0_0