Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics as non...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183079 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp
index 561a01925ac139d475a651c480867bbd15bbd9af..140efc3a53f06ae6d66d4fc143b221befefd654b 100644 (file)
--- a/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/lib/Target/Sparc/SparcISelLowering.cpp
@@ -1613,6 +1613,9 @@ static SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG,
   MachineFunction &MF = DAG.getMachineFunction();
   SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
 
+  //Need frame address to find the address of VarArgsFrameIndex
+  MF.getFrameInfo()->setFrameAddressIsTaken(true);
+
   // vastart just stores the address of the VarArgsFrameIndex slot into the
   // memory location argument.
   SDLoc DL(Op);
@@ -1719,6 +1722,9 @@ static SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
   if (depth == 0)
     RetAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, RetReg, VT);
   else {
+    //Need frame address to find return address of the caller
+    MFI->setFrameAddressIsTaken(true);
+
     // flush first to make sure the windowed registers' values are in stack
     SDValue Chain = getFLUSHW(Op, DAG);
     RetAddr = DAG.getCopyFromReg(Chain, dl, SP::I6, VT);

diff --git a/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll b/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
index 9e6583ca2ce14cfb5b5c9bfdfa9bc1fc665bb4c8..e8ade985e3c698f77856f464e220a401e03d3a42 100644 (file)
--- a/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
+++ b/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll
@@ -2,6 +2,9 @@
 ;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
 ;RUN: llc -march=sparc -regalloc=basic < %s | FileCheck %s -check-prefix=V8
 ;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
+;RUN: llc -march=sparc -disable-sparc-leaf-proc=0 < %s | FileCheck %s -check-prefix=V8LEAF
+;RUN: llc -march=sparc -disable-sparc-leaf-proc=0 -mattr=v9 < %s | FileCheck %s -check-prefix=V9LEAF
+
 
 define i8* @frameaddr() nounwind readnone {
 entry:
@@ -42,6 +45,13 @@ entry:
 
 ;V9: retaddr
 ;V9: or %g0, %i7, {{.+}}
+
+;V8LEAF: retaddr:
+;V8LEAF: or %g0, %o7, %o0
+
+;V9LEAF: retaddr:
+;V9LEAF: or %g0, %o7, %o0
+
   %0 = tail call i8* @llvm.returnaddress(i32 0)
   ret i8* %0
 }
@@ -59,6 +69,19 @@ entry:
 ;V9: ld [%fp+56], {{.+}}
 ;V9: ld [{{.+}}+56], {{.+}}
 ;V9: ld [{{.+}}+60], {{.+}}
+
+;V8LEAF: retaddr2
+;V8LEAF: ta 3
+;V8LEAF: ld [%fp+56], %[[R:[goli][0-7]]]
+;V8LEAF: ld [%[[R]]+56], %[[R1:[goli][0-7]]]
+;V8LEAF: ld [%[[R1]]+60], {{.+}}
+
+;V9LEAF: retaddr2
+;V9LEAF: flushw
+;V9LEAF: ld [%fp+56], %[[R:[goli][0-7]]]
+;V9LEAF: ld [%[[R]]+56], %[[R1:[goli][0-7]]]
+;V9LEAF: ld [%[[R1]]+60], {{.+}}
+
   %0 = tail call i8* @llvm.returnaddress(i32 3)
   ret i8* %0
 }

diff --git a/test/CodeGen/SPARC/varargs.ll b/test/CodeGen/SPARC/varargs.ll
index b13f90e6ca71dc7bdb86deece9f8b1fc51c9556c..76e16cd44f6a41c06658d0493f173f12b8dd030b 100644 (file)
--- a/test/CodeGen/SPARC/varargs.ll
+++ b/test/CodeGen/SPARC/varargs.ll
@@ -1,4 +1,5 @@
 ; RUN: llc < %s -disable-block-placement | FileCheck %s
+; RUN: llc < %s -disable-block-placement -disable-sparc-leaf-proc=0 | FileCheck %s
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32:64-S128"
 target triple = "sparcv9-sun-solaris"