[SystemZ] Add RISBLG and RISBHG instruction definitions
[oota-llvm.git] / lib / Target / SystemZ / SystemZInstrInfo.td
2013-07-31 Richard Sandiford[SystemZ] Add RISBLG and RISBHG instruction definitions
2013-07-25 Richard Sandiford[SystemZ] Rework compare and branch support
2013-07-25 Richard Sandiford[SystemZ] Add LOCR and LOCGR
2013-07-25 Richard Sandiford[SystemZ] Add LOC and LOCG
2013-07-25 Richard Sandiford[SystemZ] Add STOC and STOCG
2013-07-19 Richard Sandiford[SystemZ] Add ALRK, AGLRK, SLRK and SGLRK
2013-07-19 Richard Sandiford[SystemZ] Add AHIK and AGHIK
2013-07-19 Richard Sandiford[SystemZ] Add ARK, AGRK, SRK and SGRK
2013-07-19 Richard Sandiford[SystemZ] Add NGRK, OGRK and XGRK
2013-07-19 Richard Sandiford[SystemZ] Add NRK, ORK and XRK
2013-07-19 Richard Sandiford[SystemZ] Start adding z196 and zEC12 support
2013-07-16 Richard Sandiford[SystemZ] Add MC support for R[NOX]SBG
2013-07-12 Richard Sandiford[SystemZ] Optimize sign-extends of vector setccs
2013-07-09 Richard Sandiford[SystemZ] Use MVC for simple load/store pairs
2013-07-08 Richard Sandiford[SystemZ] Use MVC for memcpy
2013-07-03 Richard Sandiford[SystemZ] Fold more spills
2013-07-03 Richard Sandiford[SystemZ] Rename mapping table fields
2013-07-02 Richard Sandiford[SystemZ] Use DSGFR over DSGR in more cases
2013-07-02 Richard Sandiford[SystemZ] Use MVC to spill loads and stores
2013-07-02 Richard Sandiford[SystemZ] Add the MVC instruction
2013-06-27 Richard Sandiford[SystemZ] Allow LA and LARL to be rematerialized
2013-06-27 Richard Sandiford[SystemZ] Allow immediate moves to be rematerialized
2013-06-27 Richard Sandiford[SystemZ] Add conditional store patterns
2013-05-31 Richard Sandiford[SystemZ] Don't use LOAD and STORE REVERSED for volatil...
2013-05-29 Richard Sandiford[SystemZ] Immediate compare-and-branch support
2013-05-28 Richard Sandiford[SystemZ] Register compare-and-branch support
2013-05-22 Richard Sandiford[SystemZ] Rename PSW to CC
2013-05-20 Richard Sandiford[SystemZ] Add long branch pass
2013-05-15 Richard Sandiford[SystemZ] Make use of SUBTRACT HALFWORD
2013-05-14 Richard Sandiford[SystemZ] Remove bogus isAsmParserOnly
2013-05-14 Richard Sandiford[SystemZ] Match operands to fields by name rather than...
2013-05-06 Ulrich Weigand[SystemZ] Add back end
2011-10-24 Dan GohmanRemove the SystemZ backend.
2011-10-14 Jakob Stoklund OlesenBan rematerializable instructions with side effects.
2011-02-01 Anton KorobeynikovFix imm printing for logical instructions.
2010-12-23 Chris LattnerFlag -> Glue, the ongoing saga
2010-06-21 Eric ChristopherRemove isTwoAddress from SystemZ.
2010-05-28 Jakob Stoklund OlesenMerge the SystemZ subreg_even32 SubRegIndex into subreg...
2010-03-28 Chris LattnerImprove systemz to model cmp and ucmp nodes as returning
2010-03-19 Chris Lattnerset SDNPVariadic on nodes throughout the rest of the...
2010-03-08 Chris Lattnerfix a type compatibility bug. imm is i32 in the input
2010-02-27 Dan GohmanThe mayHaveSideEffects flag is no longer used.
2009-10-29 Dan GohmanRename usesCustomDAGSchedInserter to usesCustomInserter...
2009-10-28 Dan GohmanUpdate SystemZ to use PSW following the way x86 uses...
2009-08-22 Anton KorobeynikovSome dummy cost model for s390x:
2009-08-21 Anton KorobeynikovTypo :(
2009-08-21 Anton KorobeynikovCorrect instruction names for subtract-with-borrow
2009-08-05 Anton KorobeynikovConvert bswap test to filecheck, add more test entries...
2009-08-05 Anton KorobeynikovAdd memory versions of some instructions.
2009-07-18 Anton KorobeynikovAdd carry producing / using versions of add / sub
2009-07-18 Anton KorobeynikovProvide expansion for ct* intrinsics
2009-07-16 Anton KorobeynikovTemporary disable 16 bit bswap
2009-07-16 Anton KorobeynikovAdd instruction formats and few opcodes
2009-07-16 Anton KorobeynikovAdd bswap patterns
2009-07-16 Anton KorobeynikovProvide crazy pseudos for regpairs spills / reloads
2009-07-16 Anton KorobeynikovRevert the commit, it just hides the real bug
2009-07-16 Anton KorobeynikovOut GR128 regclass is not a 'real' i128 one.
2009-07-16 Anton KorobeynikovHandle bitconverts
2009-07-16 Anton KorobeynikovLower anyext to zext, 32-bit stuff does not have any...
2009-07-16 Anton KorobeynikovHandle FP callee-saved regs
2009-07-16 Anton KorobeynikovImplement all comparisons
2009-07-16 Anton KorobeynikovAdd constpool lowering / printing
2009-07-16 Anton KorobeynikovFix fallout from prev. patch
2009-07-16 Anton KorobeynikovUse divide single for 32 bit signed divides
2009-07-16 Anton KorobeynikovImplement 'large' PIC model
2009-07-16 Anton KorobeynikovImplement shifts properly (hopefilly - finally!)
2009-07-16 Anton KorobeynikovRemove redundand register move
2009-07-16 Anton KorobeynikovProperly handle divides. As a bonus - implement memory...
2009-07-16 Anton KorobeynikovFix epic fail: full-width muls are not commutable....
2009-07-16 Anton Korobeynikov32 bit rotate is not twoaddr instruction
2009-07-16 Anton Korobeynikov32 bit shifts have only 12 bit displacements
2009-07-16 Anton KorobeynikovUnbreak indirect branches
2009-07-16 Anton KorobeynikovAll calls clobbers R14
2009-07-16 Anton KorobeynikovConsolidate reg-imm / reg-reg-imm address mode selectio...
2009-07-16 Anton KorobeynikovAdd support for 12 bit displacements
2009-07-16 Anton KorobeynikovAdd jump tables
2009-07-16 Anton KorobeynikovExapnd br_jt into indirect branch. Provide pattern...
2009-07-16 Anton KorobeynikovImplement 64 bit immediates
2009-07-16 Anton KorobeynikovAdd rotates
2009-07-16 Anton KorobeynikovAdd patterns for integer negate
2009-07-16 Anton KorobeynikovProvide proper patterns for and with imm instructions...
2009-07-16 Anton KorobeynikovAdd 32 bit and reg-imm and disable invalid patterns...
2009-07-16 Anton KorobeynikovAdd z9 and z10 target processors. Mark z10-only instruc...
2009-07-16 Anton KorobeynikovFix MUL64rm instruction asmprinting
2009-07-16 Anton KorobeynikovPreliminary asmprinting of globals
2009-07-16 Anton KorobeynikovImplement asmprinting for odd-even regpairs
2009-07-16 Anton Korobeynikov32-bit ri addressing mode has only 12-bit displacement
2009-07-16 Anton KorobeynikovPrint signed imms properly
2009-07-16 Anton KorobeynikovPipehole pattern for i32 imm's
2009-07-16 Anton KorobeynikovBunch of sext_inreg patterns
2009-07-16 Anton KorobeynikovProvide normal 32 bit load and store
2009-07-16 Anton KorobeynikovProper lower 'small' results
2009-07-16 Anton KorobeynikovCompletel forgot about unconditional branches
2009-07-16 Anton KorobeynikovLower addresses of globals
2009-07-16 Anton KorobeynikovProvide "wide" muls and divs/rems
2009-07-16 Anton KorobeynikovPreliminary mul lowering
2009-07-16 Anton KorobeynikovMore extloads
2009-07-16 Anton KorobeynikovSELECT_CC lowering
2009-07-16 Anton KorobeynikovConditional branches and comparisons
2009-07-16 Anton KorobeynikovEmit callee-saved regs spills / restores
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