[SystemZ] Add NGRK, OGRK and XGRK

Like r186683, but for 64 bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186685 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/SystemZ/SystemZInstrFormats.td b/lib/Target/SystemZ/SystemZInstrFormats.td
index 24f86bca09f91504c5baf45cdef7b310783a3b43..f0999756281bec9ae87076c8d03af81ea8b6f854 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -747,6 +747,18 @@ multiclass BinaryRRAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
   }
 }
 
+multiclass BinaryRREAndK<string mnemonic, bits<16> opcode1, bits<16> opcode2,
+                         SDPatternOperator operator, RegisterOperand cls1,
+                         RegisterOperand cls2> {
+  let NumOpsKey = mnemonic in {
+    let NumOpsValue = "3" in
+      def K : BinaryRRFK<mnemonic, opcode2, null_frag, cls1, cls2>,
+              Requires<[FeatureDistinctOps]>;
+    let NumOpsValue = "2", isConvertibleToThreeAddress = 1 in
+      def "" : BinaryRRE<mnemonic, opcode1, operator, cls1, cls2>;
+  }
+}
+
 class BinaryRI<string mnemonic, bits<12> opcode, SDPatternOperator operator,
                RegisterOperand cls, Immediate imm>
   : InstRI<opcode, (outs cls:$R1), (ins cls:$R1src, imm:$I2),

diff --git a/lib/Target/SystemZ/SystemZInstrInfo.td b/lib/Target/SystemZ/SystemZInstrInfo.td
index 94b8a3efb09541b51aba1cfc59daa1b2b72eb16b..5ae6af23aec6fd0255fdd32fb69fb35cbcf7bba4 100644 (file)
--- a/lib/Target/SystemZ/SystemZInstrInfo.td
+++ b/lib/Target/SystemZ/SystemZInstrInfo.td
@@ -649,7 +649,7 @@ let Defs = [CC] in {
   // ANDs of a register.
   let isCommutable = 1 in {
     defm NR : BinaryRRAndK<"n", 0x14, 0xB9F4, and, GR32, GR32>;
-    def NGR : BinaryRRE<"ng", 0xB980, and, GR64, GR64>;
+    defm NGR : BinaryRREAndK<"ng", 0xB980, 0xB9E4, and, GR64, GR64>;
   }
 
   // ANDs of a 16-bit immediate, leaving other bits unaffected.
@@ -686,7 +686,7 @@ let Defs = [CC] in {
   // ORs of a register.
   let isCommutable = 1 in {
     defm OR : BinaryRRAndK<"o", 0x16, 0xB9F6, or, GR32, GR32>;
-    def OGR : BinaryRRE<"og", 0xB981, or, GR64, GR64>;
+    defm OGR : BinaryRREAndK<"og", 0xB981, 0xB9E6, or, GR64, GR64>;
   }
 
   // ORs of a 16-bit immediate, leaving other bits unaffected.
@@ -723,7 +723,7 @@ let Defs = [CC] in {
   // XORs of a register.
   let isCommutable = 1 in {
     defm XR : BinaryRRAndK<"x", 0x17, 0xB9F7, xor, GR32, GR32>;
-    def XGR : BinaryRRE<"xg", 0xB982, xor, GR64, GR64>;
+    defm XGR : BinaryRREAndK<"xg", 0xB982, 0xB9E7, xor, GR64, GR64>;
   }
 
   // XORs of a 32-bit immediate, leaving other bits unaffected.

diff --git a/test/CodeGen/SystemZ/and-03.ll b/test/CodeGen/SystemZ/and-03.ll
index ca262cfb459a5f858802994b49f643f320dfef9f..a0560d46e4ea4d0d8ba6fa7fddc4c3ef4b2eaa78 100644 (file)
--- a/test/CodeGen/SystemZ/and-03.ll
+++ b/test/CodeGen/SystemZ/and-03.ll
@@ -1,6 +1,7 @@
 ; Test 64-bit ANDs in which the second operand is variable.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
 
 declare i64 @foo()
 

diff --git a/test/CodeGen/SystemZ/and-07.ll b/test/CodeGen/SystemZ/and-07.ll
index 2bdf97d47044df4158fdde4b2da684b766ec20e0..ad4c4af59fd719320dd6fa46648035d6c6d92225 100644 (file)
--- a/test/CodeGen/SystemZ/and-07.ll
+++ b/test/CodeGen/SystemZ/and-07.ll
@@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) {
   %and = and i32 %a, %b
   ret i32 %and
 }
+
+; Check NGRK.
+define i64 @f3(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: f3:
+; CHECK: ngrk %r2, %r3, %r4
+; CHECK: br %r14
+  %and = and i64 %b, %c
+  ret i64 %and
+}
+
+; Check that we can still use NGR in obvious cases.
+define i64 @f4(i64 %a, i64 %b) {
+; CHECK-LABEL: f4:
+; CHECK: ngr %r2, %r3
+; CHECK: br %r14
+  %and = and i64 %a, %b
+  ret i64 %and
+}

diff --git a/test/CodeGen/SystemZ/atomicrmw-and-04.ll b/test/CodeGen/SystemZ/atomicrmw-and-04.ll
index 6a9f81ac39b1d46cf937766eb45aeb41046f1b53..b224423c0b35e06d750f6dc36c5c484a7834cef4 100644 (file)
--- a/test/CodeGen/SystemZ/atomicrmw-and-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-and-04.ll
@@ -1,6 +1,6 @@
 ; Test 64-bit atomic ANDs.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
 
 ; Check ANDs of a variable.
 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {

diff --git a/test/CodeGen/SystemZ/atomicrmw-nand-04.ll b/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
index 2fb919d3a34156706dacae85e653b150544b43ba..907647106c8ba7bd9edcdbaa112ef13b93c225c8 100644 (file)
--- a/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
@@ -1,6 +1,6 @@
 ; Test 64-bit atomic NANDs.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
 
 ; Check NANDs of a variable.
 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {

diff --git a/test/CodeGen/SystemZ/atomicrmw-or-04.ll b/test/CodeGen/SystemZ/atomicrmw-or-04.ll
index de798be1c138a2e1670b8b16a668886e6761cfbb..478276876597abee3d907cac0ecb65e519dcf85a 100644 (file)
--- a/test/CodeGen/SystemZ/atomicrmw-or-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-or-04.ll
@@ -1,6 +1,6 @@
 ; Test 64-bit atomic ORs.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
 
 ; Check ORs of a variable.
 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {

diff --git a/test/CodeGen/SystemZ/atomicrmw-xor-04.ll b/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
index d767b20a5744c41b9223dd88c6a525261a9bd26b..1e438bd2dc127510390bb92554e1bbcc66c4ce80 100644 (file)
--- a/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
+++ b/test/CodeGen/SystemZ/atomicrmw-xor-04.ll
@@ -1,6 +1,6 @@
 ; Test 64-bit atomic XORs.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
 
 ; Check XORs of a variable.
 define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {

diff --git a/test/CodeGen/SystemZ/or-03.ll b/test/CodeGen/SystemZ/or-03.ll
index 3e373673686f82fd06d403332c59a9d92ca0740e..5fdbdfd1ed1f2a784c57ed18c37251ad74fc9ffb 100644 (file)
--- a/test/CodeGen/SystemZ/or-03.ll
+++ b/test/CodeGen/SystemZ/or-03.ll
@@ -1,6 +1,7 @@
 ; Test 64-bit ORs in which the second operand is variable.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
 
 declare i64 @foo()
 

diff --git a/test/CodeGen/SystemZ/or-07.ll b/test/CodeGen/SystemZ/or-07.ll
index f6848a16591527443acda607056cee951a3ec661..9fff88e71657b0602474c4c06dbdb5301f6117d4 100644 (file)
--- a/test/CodeGen/SystemZ/or-07.ll
+++ b/test/CodeGen/SystemZ/or-07.ll
@@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) {
   %or = or i32 %a, %b
   ret i32 %or
 }
+
+; Check OGRK.
+define i64 @f3(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: f3:
+; CHECK: ogrk %r2, %r3, %r4
+; CHECK: br %r14
+  %or = or i64 %b, %c
+  ret i64 %or
+}
+
+; Check that we can still use OGR in obvious cases.
+define i64 @f4(i64 %a, i64 %b) {
+; CHECK-LABEL: f4:
+; CHECK: ogr %r2, %r3
+; CHECK: br %r14
+  %or = or i64 %a, %b
+  ret i64 %or
+}

diff --git a/test/CodeGen/SystemZ/xor-03.ll b/test/CodeGen/SystemZ/xor-03.ll
index 2cd428ae7fc4670d3f9f46d7b997c062f1fd45ba..ab7f2584b60d7bcde754179c2f31839e438db782 100644 (file)
--- a/test/CodeGen/SystemZ/xor-03.ll
+++ b/test/CodeGen/SystemZ/xor-03.ll
@@ -1,6 +1,7 @@
 ; Test 64-bit XORs in which the second operand is variable.
 ;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
 
 declare i64 @foo()
 

diff --git a/test/CodeGen/SystemZ/xor-07.ll b/test/CodeGen/SystemZ/xor-07.ll
index 22deef64ce9d780818014822e8201ecce62cf1b1..ec2a0385b16112d5a7ee3b913b8742398800b5a3 100644 (file)
--- a/test/CodeGen/SystemZ/xor-07.ll
+++ b/test/CodeGen/SystemZ/xor-07.ll
@@ -19,3 +19,21 @@ define i32 @f2(i32 %a, i32 %b) {
   %xor = xor i32 %a, %b
   ret i32 %xor
 }
+
+; Check XGRK.
+define i64 @f3(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: f3:
+; CHECK: xgrk %r2, %r3, %r4
+; CHECK: br %r14
+  %xor = xor i64 %b, %c
+  ret i64 %xor
+}
+
+; Check that we can still use XGR in obvious cases.
+define i64 @f4(i64 %a, i64 %b) {
+; CHECK-LABEL: f4:
+; CHECK: xgr %r2, %r3
+; CHECK: br %r14
+  %xor = xor i64 %a, %b
+  ret i64 %xor
+}

diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt
index 68d585ad2ae3902aaa1f06dd435f2395979fe104..4352ae0fbf1f25f1513d2f2012989dac307db7ae 100644 (file)
--- a/test/MC/Disassembler/SystemZ/insns.txt
+++ b/test/MC/Disassembler/SystemZ/insns.txt
@@ -4207,6 +4207,12 @@
 # CHECK: ng %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x80
 
+# CHECK: ngrk %r0, %r0, %r0
+0xb9 0xe4 0x00 0x00
+
+# CHECK: ngrk %r2, %r3, %r4
+0xb9 0xe4 0x40 0x23
+
 # CHECK: ng %r0, -1
 0xe3 0x00 0x0f 0xff 0xff 0x80
 
@@ -4432,6 +4438,12 @@
 # CHECK: ogr %r7, %r8
 0xb9 0x81 0x00 0x78
 
+# CHECK: ogrk %r0, %r0, %r0
+0xb9 0xe6 0x00 0x00
+
+# CHECK: ogrk %r2, %r3, %r4
+0xb9 0xe6 0x40 0x23
+
 # CHECK: og %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x81
 
@@ -6091,6 +6103,12 @@
 # CHECK: xgr %r7, %r8
 0xb9 0x82 0x00 0x78
 
+# CHECK: xgrk %r0, %r0, %r0
+0xb9 0xe7 0x00 0x00
+
+# CHECK: xgrk %r2, %r3, %r4
+0xb9 0xe7 0x40 0x23
+
 # CHECK: xg %r0, -524288
 0xe3 0x00 0x00 0x00 0x80 0x82
 

diff --git a/test/MC/SystemZ/insn-bad.s b/test/MC/SystemZ/insn-bad.s
index ccc778dee2fad96371bbff46fda63bbe6845c545..6d1b086ad2d23c621196abf8660584395c03cf64 100644 (file)
--- a/test/MC/SystemZ/insn-bad.s
+++ b/test/MC/SystemZ/insn-bad.s
@@ -1900,6 +1900,11 @@
        ng      %r0, -524289
        ng      %r0, 524288
 
+#CHECK: error: {{(instruction requires: distinct-ops)?}}
+#CHECK: ngrk   %r2,%r3,%r4
+
+       ngrk    %r2,%r3,%r4
+
 #CHECK: error: invalid operand
 #CHECK: ni     -1, 0
 #CHECK: error: invalid operand
@@ -2011,6 +2016,11 @@
        og      %r0, -524289
        og      %r0, 524288
 
+#CHECK: error: {{(instruction requires: distinct-ops)?}}
+#CHECK: ogrk   %r2,%r3,%r4
+
+       ogrk    %r2,%r3,%r4
+
 #CHECK: error: invalid operand
 #CHECK: oi     -1, 0
 #CHECK: error: invalid operand
@@ -2646,6 +2656,11 @@
        xg      %r0, -524289
        xg      %r0, 524288
 
+#CHECK: error: {{(instruction requires: distinct-ops)?}}
+#CHECK: xgrk   %r2,%r3,%r4
+
+       xgrk    %r2,%r3,%r4
+
 #CHECK: error: invalid operand
 #CHECK: xi     -1, 0
 #CHECK: error: invalid operand

diff --git a/test/MC/SystemZ/insn-good-z196.s b/test/MC/SystemZ/insn-good-z196.s
index 9d64670cdf24a2b51856befee224f50e5d0cf41e..e00f9049f751b17d853941f037e53d587b9f8c7a 100644 (file)
--- a/test/MC/SystemZ/insn-good-z196.s
+++ b/test/MC/SystemZ/insn-good-z196.s
@@ -1,6 +1,18 @@
 # For z196 and above.
 # RUN: llvm-mc -triple s390x-linux-gnu -mcpu=z196 -show-encoding %s | FileCheck %s
 
+#CHECK: ngrk   %r0, %r0, %r0           # encoding: [0xb9,0xe4,0x00,0x00]
+#CHECK: ngrk   %r0, %r0, %r15          # encoding: [0xb9,0xe4,0xf0,0x00]
+#CHECK: ngrk   %r0, %r15, %r0          # encoding: [0xb9,0xe4,0x00,0x0f]
+#CHECK: ngrk   %r15, %r0, %r0          # encoding: [0xb9,0xe4,0x00,0xf0]
+#CHECK: ngrk   %r7, %r8, %r9           # encoding: [0xb9,0xe4,0x90,0x78]
+
+       ngrk    %r0,%r0,%r0
+       ngrk    %r0,%r0,%r15
+       ngrk    %r0,%r15,%r0
+       ngrk    %r15,%r0,%r0
+       ngrk    %r7,%r8,%r9
+
 #CHECK: nrk    %r0, %r0, %r0           # encoding: [0xb9,0xf4,0x00,0x00]
 #CHECK: nrk    %r0, %r0, %r15          # encoding: [0xb9,0xf4,0xf0,0x00]
 #CHECK: nrk    %r0, %r15, %r0          # encoding: [0xb9,0xf4,0x00,0x0f]
@@ -13,6 +25,18 @@
        nrk     %r15,%r0,%r0
        nrk     %r7,%r8,%r9
 
+#CHECK: ogrk   %r0, %r0, %r0           # encoding: [0xb9,0xe6,0x00,0x00]
+#CHECK: ogrk   %r0, %r0, %r15          # encoding: [0xb9,0xe6,0xf0,0x00]
+#CHECK: ogrk   %r0, %r15, %r0          # encoding: [0xb9,0xe6,0x00,0x0f]
+#CHECK: ogrk   %r15, %r0, %r0          # encoding: [0xb9,0xe6,0x00,0xf0]
+#CHECK: ogrk   %r7, %r8, %r9           # encoding: [0xb9,0xe6,0x90,0x78]
+
+       ogrk    %r0,%r0,%r0
+       ogrk    %r0,%r0,%r15
+       ogrk    %r0,%r15,%r0
+       ogrk    %r15,%r0,%r0
+       ogrk    %r7,%r8,%r9
+
 #CHECK: ork    %r0, %r0, %r0           # encoding: [0xb9,0xf6,0x00,0x00]
 #CHECK: ork    %r0, %r0, %r15          # encoding: [0xb9,0xf6,0xf0,0x00]
 #CHECK: ork    %r0, %r15, %r0          # encoding: [0xb9,0xf6,0x00,0x0f]
@@ -103,6 +127,18 @@
        srlk    %r0,%r0,524287(%r1)
        srlk    %r0,%r0,524287(%r15)
 
+#CHECK: xgrk   %r0, %r0, %r0           # encoding: [0xb9,0xe7,0x00,0x00]
+#CHECK: xgrk   %r0, %r0, %r15          # encoding: [0xb9,0xe7,0xf0,0x00]
+#CHECK: xgrk   %r0, %r15, %r0          # encoding: [0xb9,0xe7,0x00,0x0f]
+#CHECK: xgrk   %r15, %r0, %r0          # encoding: [0xb9,0xe7,0x00,0xf0]
+#CHECK: xgrk   %r7, %r8, %r9           # encoding: [0xb9,0xe7,0x90,0x78]
+
+       xgrk    %r0,%r0,%r0
+       xgrk    %r0,%r0,%r15
+       xgrk    %r0,%r15,%r0
+       xgrk    %r15,%r0,%r0
+       xgrk    %r7,%r8,%r9
+
 #CHECK: xrk    %r0, %r0, %r0           # encoding: [0xb9,0xf7,0x00,0x00]
 #CHECK: xrk    %r0, %r0, %r15          # encoding: [0xb9,0xf7,0xf0,0x00]
 #CHECK: xrk    %r0, %r15, %r0          # encoding: [0xb9,0xf7,0x00,0x0f]