def LXDB : UnaryRXE<"lxdb", 0xED05, extloadf64, FP128>;
// Convert a signed integer register value to a floating-point one.
-let Defs = [PSW] in {
+let Defs = [CC] in {
def CEFBR : UnaryRRE<"cefbr", 0xB394, sint_to_fp, FP32, GR32>;
def CDFBR : UnaryRRE<"cdfbr", 0xB395, sint_to_fp, FP64, GR32>;
def CXFBR : UnaryRRE<"cxfbr", 0xB396, sint_to_fp, FP128, GR32>;
// Convert a floating-point register value to a signed integer value,
// with the second operand (modifier M3) specifying the rounding mode.
-let Defs = [PSW] in {
+let Defs = [CC] in {
def CFEBR : UnaryRRF<"cfebr", 0xB398, GR32, FP32>;
def CFDBR : UnaryRRF<"cfdbr", 0xB399, GR32, FP64>;
def CFXBR : UnaryRRF<"cfxbr", 0xB39A, GR32, FP128>;
//===----------------------------------------------------------------------===//
// Negation (Load Complement).
-let Defs = [PSW] in {
+let Defs = [CC] in {
def LCEBR : UnaryRRE<"lcebr", 0xB303, fneg, FP32, FP32>;
def LCDBR : UnaryRRE<"lcdbr", 0xB313, fneg, FP64, FP64>;
def LCXBR : UnaryRRE<"lcxbr", 0xB343, fneg, FP128, FP128>;
}
// Absolute value (Load Positive).
-let Defs = [PSW] in {
+let Defs = [CC] in {
def LPEBR : UnaryRRE<"lpebr", 0xB300, fabs, FP32, FP32>;
def LPDBR : UnaryRRE<"lpdbr", 0xB310, fabs, FP64, FP64>;
def LPXBR : UnaryRRE<"lpxbr", 0xB340, fabs, FP128, FP128>;
}
// Negative absolute value (Load Negative).
-let Defs = [PSW] in {
+let Defs = [CC] in {
def LNEBR : UnaryRRE<"lnebr", 0xB301, fnabs, FP32, FP32>;
def LNDBR : UnaryRRE<"lndbr", 0xB311, fnabs, FP64, FP64>;
def LNXBR : UnaryRRE<"lnxbr", 0xB341, fnabs, FP128, FP128>;
// These forms always check for inexact conditions. z196 added versions
// that allow this to suppressed (as for fnearbyint), but we don't yet
// support -march=z196.
-let Defs = [PSW] in {
+let Defs = [CC] in {
def FIEBR : UnaryRRF<"fiebr", 0xB357, FP32, FP32>;
def FIDBR : UnaryRRF<"fidbr", 0xB35F, FP64, FP64>;
def FIXBR : UnaryRRF<"fixbr", 0xB347, FP128, FP128>;
//===----------------------------------------------------------------------===//
// Addition.
-let Defs = [PSW] in {
+let Defs = [CC] in {
let isCommutable = 1 in {
def AEBR : BinaryRRE<"aebr", 0xB30A, fadd, FP32, FP32>;
def ADBR : BinaryRRE<"adbr", 0xB31A, fadd, FP64, FP64>;
}
// Subtraction.
-let Defs = [PSW] in {
+let Defs = [CC] in {
def SEBR : BinaryRRE<"sebr", 0xB30B, fsub, FP32, FP32>;
def SDBR : BinaryRRE<"sdbr", 0xB31B, fsub, FP64, FP64>;
def SXBR : BinaryRRE<"sxbr", 0xB34B, fsub, FP128, FP128>;
// Comparisons
//===----------------------------------------------------------------------===//
-let Defs = [PSW] in {
+let Defs = [CC] in {
def CEBR : CompareRRE<"cebr", 0xB309, z_cmp, FP32, FP32>;
def CDBR : CompareRRE<"cdbr", 0xB319, z_cmp, FP64, FP64>;
def CXBR : CompareRRE<"cxbr", 0xB349, z_cmp, FP128, FP128>;
// the first operand. It seems friendlier to use mnemonic forms like
// JE and JLH when writing out the assembly though.
multiclass CondBranches<Operand imm, string short, string long> {
- let isBranch = 1, isTerminator = 1, Uses = [PSW] in {
+ let isBranch = 1, isTerminator = 1, Uses = [CC] in {
def "" : InstRI<0xA74, (outs), (ins imm:$R1, brtarget16:$I2), short, []>;
def L : InstRIL<0xC04, (outs), (ins imm:$R1, brtarget32:$I2), long, []>;
}
// Negation
//===----------------------------------------------------------------------===//
-let Defs = [PSW] in {
+let Defs = [CC] in {
def LCR : UnaryRR <"lcr", 0x13, ineg, GR32, GR32>;
def LCGR : UnaryRRE<"lcgr", 0xB903, ineg, GR64, GR64>;
def LCGFR : UnaryRRE<"lcgfr", 0xB913, null_frag, GR64, GR32>;
//===----------------------------------------------------------------------===//
// Plain addition.
-let Defs = [PSW] in {
+let Defs = [CC] in {
// Addition of a register.
let isCommutable = 1 in {
def AR : BinaryRR <"ar", 0x1A, add, GR32, GR32>;
defm : SXB<add, GR64, AGFR>;
// Addition producing a carry.
-let Defs = [PSW] in {
+let Defs = [CC] in {
// Addition of a register.
let isCommutable = 1 in {
def ALR : BinaryRR <"alr", 0x1E, addc, GR32, GR32>;
defm : ZXB<addc, GR64, ALGFR>;
// Addition producing and using a carry.
-let Defs = [PSW], Uses = [PSW] in {
+let Defs = [CC], Uses = [CC] in {
// Addition of a register.
def ALCR : BinaryRRE<"alcr", 0xB998, adde, GR32, GR32>;
def ALCGR : BinaryRRE<"alcgr", 0xB988, adde, GR64, GR64>;
// Plain substraction. Although immediate forms exist, we use the
// add-immediate instruction instead.
-let Defs = [PSW] in {
+let Defs = [CC] in {
// Subtraction of a register.
def SR : BinaryRR <"sr", 0x1B, sub, GR32, GR32>;
def SGFR : BinaryRRE<"sgfr", 0xB919, null_frag, GR64, GR32>;
defm : SXB<sub, GR64, SGFR>;
// Subtraction producing a carry.
-let Defs = [PSW] in {
+let Defs = [CC] in {
// Subtraction of a register.
def SLR : BinaryRR <"slr", 0x1F, subc, GR32, GR32>;
def SLGFR : BinaryRRE<"slgfr", 0xB91B, null_frag, GR64, GR32>;
defm : ZXB<subc, GR64, SLGFR>;
// Subtraction producing and using a carry.
-let Defs = [PSW], Uses = [PSW] in {
+let Defs = [CC], Uses = [CC] in {
// Subtraction of a register.
def SLBR : BinaryRRE<"slbr", 0xB999, sube, GR32, GR32>;
def SLGBR : BinaryRRE<"slbgr", 0xB989, sube, GR64, GR64>;
// AND
//===----------------------------------------------------------------------===//
-let Defs = [PSW] in {
+let Defs = [CC] in {
// ANDs of a register.
let isCommutable = 1 in {
def NR : BinaryRR <"nr", 0x14, and, GR32, GR32>;
// OR
//===----------------------------------------------------------------------===//
-let Defs = [PSW] in {
+let Defs = [CC] in {
// ORs of a register.
let isCommutable = 1 in {
def OR : BinaryRR <"or", 0x16, or, GR32, GR32>;
// XOR
//===----------------------------------------------------------------------===//
-let Defs = [PSW] in {
+let Defs = [CC] in {
// XORs of a register.
let isCommutable = 1 in {
def XR : BinaryRR <"xr", 0x17, xor, GR32, GR32>;
}
// Arithmetic shift right.
-let Defs = [PSW] in {
+let Defs = [CC] in {
def SRA : ShiftRS <"sra", 0x8A, sra, GR32, shift12only>;
def SRAG : ShiftRSY<"srag", 0xEB0A, sra, GR64, shift20only>;
}
// Rotate second operand left and inserted selected bits into first operand.
// These can act like 32-bit operands provided that the constant start and
// end bits (operands 2 and 3) are in the range [32, 64)
-let Defs = [PSW] in {
+let Defs = [CC] in {
let isCodeGenOnly = 1 in
def RISBG32 : RotateSelectRIEf<"risbg", 0xEC55, GR32, GR32>;
def RISBG : RotateSelectRIEf<"risbg", 0xEC55, GR64, GR64>;
//===----------------------------------------------------------------------===//
// Signed comparisons.
-let Defs = [PSW] in {
+let Defs = [CC] in {
// Comparison with a register.
def CR : CompareRR <"cr", 0x19, z_cmp, GR32, GR32>;
def CGFR : CompareRRE<"cgfr", 0xB930, null_frag, GR64, GR32>;
defm : SXB<z_cmp, GR64, CGFR>;
// Unsigned comparisons.
-let Defs = [PSW] in {
+let Defs = [CC] in {
// Comparison with a register.
def CLR : CompareRR <"clr", 0x15, z_ucmp, GR32, GR32>;
def CLGFR : CompareRRE<"clgfr", 0xB931, null_frag, GR64, GR32>;
(z_atomic_cmp_swapw bdaddr20only:$addr, GR32:$cmp, GR32:$swap,
ADDR32:$bitshift, ADDR32:$negbitshift,
uimm32:$bitsize))]> {
- let Defs = [PSW];
+ let Defs = [CC];
let mayLoad = 1;
let mayStore = 1;
let usesCustomInserter = 1;
}
-let Defs = [PSW] in {
+let Defs = [CC] in {
defm CS : CmpSwapRSPair<"cs", 0xBA, 0xEB14, atomic_cmp_swap_32, GR32>;
def CSG : CmpSwapRSY<"csg", 0xEB30, atomic_cmp_swap_64, GR64>;
}
// returns a pair of GR64s, the first giving the number of leading zeros
// and the second giving a copy of the source with the leftmost one bit
// cleared. We only use the first result here.
-let Defs = [PSW] in {
+let Defs = [CC] in {
def FLOGR : UnaryRRE<"flogr", 0xB983, null_frag, GR128, GR64>;
}
def : Pat<(ctlz GR64:$src),