Revert 239644.
[oota-llvm.git] / lib / Target / R600 / SIRegisterInfo.cpp
2015-05-12 Tom StellardR600/SI: Update tablegen defs to avoid restoring spille...
2015-05-12 Tom StellardR600/SI: Remove M0Reg register class
2015-05-12 Tom StellardR600/SI: Replace TRI->getRegClass(Reg) with TRI->getPhy...
2015-03-24 Marek OlsakR600/SI: Insert more NOPs after READLANE on VI, don...
2015-03-11 Eric ChristopherRemove the need to cache the subtarget in the R600...
2015-03-11 Eric ChristopherHave getRegPressureSetLimit take a MachineFunction...
2015-03-09 Marek OlsakR600/SI: Limit SGPRs to 80 on Tonga and Iceland
2015-03-09 Marek OlsakR600/SI: Fix getNumSGPRsAllowed for VI
2015-02-27 Tom StellardR600/SI: Consistently put soffset before the offset...
2015-02-03 Marek OlsakR600/SI: Determine target-specific encoding of READLANE...
2015-01-30 Tom StellardR600/SI: Handle SI_SPILL_V96_RESTORE in SIRegisterInfo...
2015-01-29 Tom StellardR600/SI: Remove stray debug statements
2015-01-29 Tom StellardR600/SI: Define a schedule model and enable the generic...
2015-01-20 Tom StellardR600/SI: Add subtarget feature to enable VGPR spilling...
2015-01-20 Tom StellardR600/SI: Fix simple-loop.ll test
2015-01-20 Tom StellardR600/SI: Use external symbols for scratch buffer
2015-01-20 Tom StellardR600/SI: Add kill flag when copying scratch offset...
2015-01-14 Tom StellardR600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-12 Tom StellardR600/SI: Use RegisterOperands to specify which operands...
2015-01-07 Tom StellardR600/SI: Remove VReg_32 register class
2014-12-19 Tom StellardR600/SI: Make sure non-inline constants aren't folded...
2014-11-25 Matt ArsenaultR600/SI: Fix allocating flat_scr_lo / flat_scr_hi
2014-11-14 Tom StellardR600/SI: Fix spilling of m0 register
2014-11-14 Matt ArsenaultR600/SI: Make constant array static
2014-09-24 Matt ArsenaultR600/SI: Add new helper isSGPRClassID
2014-09-24 Tom StellardR600/SI: Mark EXEC_LO and EXEC_HI as reserved
2014-09-24 Tom StellardR600/SI: Fix SIRegisterInfo::getPhysRegSubReg()
2014-09-24 Tom StellardR600/SI: Implement VGPR register spilling for compute...
2014-09-23 Tom StellardR600/SI: Clean up checks for legality of immediate...
2014-09-22 Tom StellardR600/SI: Add enums for some hard-coded values
2014-09-15 Matt ArsenaultR600/SI: Add preliminary support for flat address space
2014-08-21 Tom StellardR600/SI: Use eliminateFrameIndex() to expand SGPR spill...
2014-08-21 Tom StellardR600/SI: Handle VCC in SIRegisterInfo::getPhysRegSubReg()
2014-07-21 Saleem AbdulrasoolR600: silence GCC warning
2014-07-21 Tom StellardR600/SI: Use scratch memory for large private arrays
2014-07-02 Tom StellardR600/SI: Add verifier check for immediates in register...
2014-06-13 Tom StellardR600: Remove AMDIL instruction and register definitions
2014-06-13 Tom StellardR600: Move AMDGPUInstrInfo from AMDGPUTargetMachine...
2014-05-12 Matt ArsenaultUse range for
2014-05-02 Tom StellardR600/SI: Only create one instruction when spilling...
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition.
2014-03-31 Tom StellardR600/SI: Return the correct index for VGPRs in getHWReg...
2014-01-24 Alp TokerFix known typos
2013-11-18 Matt ArsenaultR600/SI: Fix moveToVALU when the first operand is VSrc.
2013-11-15 Tom StellardR600/SI: Add VReg_96 register class to SIRegisterInfo...
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-11-13 Tom StellardR600/SI: Prefer SALU instructions for bit shift operations
2013-11-10 Matt ArsenaultMake method static
2013-10-10 Tom StellardR600/SI: Mark the EXEC register as reserved
2013-08-14 Tom StellardR600/SI: Choose the correct MOV instruction for copying...
2013-08-06 Tom StellardR600/SI: Add more special cases for opcodes to ensureSR...
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-03-26 Christian KonigR600/SI: switch back to RegPressure scheduling
2012-12-11 Tom StellardAdd R600 backend