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R600/SI: Return the correct index for VGPRs in getHWRegIndex()
author
Tom Stellard
<thomas.stellard@amd.com>
Mon, 31 Mar 2014 14:01:52 +0000
(14:01 +0000)
committer
Tom Stellard
<thomas.stellard@amd.com>
Mon, 31 Mar 2014 14:01:52 +0000
(14:01 +0000)
The register index is stored in the low 8-bits of the encoding.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205186
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/R600/SIRegisterInfo.cpp
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diff --git
a/lib/Target/R600/SIRegisterInfo.cpp
b/lib/Target/R600/SIRegisterInfo.cpp
index a784fa42647ba96b6f7fb4a29d1b1811d6513d28..6cef1954935d27a8e5c8d6d5b0f2401ca038adbf 100644
(file)
--- a/
lib/Target/R600/SIRegisterInfo.cpp
+++ b/
lib/Target/R600/SIRegisterInfo.cpp
@@
-56,7
+56,7
@@
const TargetRegisterClass * SIRegisterInfo::getCFGStructurizerRegClass(
}
unsigned SIRegisterInfo::getHWRegIndex(unsigned Reg) const {
- return getEncodingValue(Reg);
+ return getEncodingValue(Reg)
& 0xff
;
}
const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const {