R600/SI: Initial support for assembler and inline assembly
[oota-llvm.git] / lib / Target / R600 / SIInstrFormats.td
2015-04-08 Tom StellardR600/SI: Initial support for assembler and inline assembly
2015-04-08 Tom StellardR600/SI: Add missing SOPK instructions
2015-03-12 Tom StellardR600/SI: Remove _e32 and _e64 suffixes from mnemonics
2015-03-09 Tom StellardR600/SI: Refactor DS instruction defs
2015-02-21 Matt ArsenaultR600/SI: Fix mad*k definitions
2015-02-18 Marek OlsakR600/SI: Fix READLANE and WRITELANE lane select for VI
2015-02-18 Tom StellardR600/SI: Don't set isCodeGenOnly = 1 on all instructions
2015-02-18 Matt ArsenaultR600/SI: Rename dst encoding field to be consistent...
2015-02-18 Matt ArsenaultR600/SI: Consistently capitalize encoding field names
2015-02-14 Matt ArsenaultR600/SI: Rename encoding field to match docs for VOP3b
2015-02-14 Matt ArsenaultR600/SI: Fix VOP3b encoding on VI
2015-02-06 Michel DanzerR600/SI: Also enable WQM for image opcodes which calcul...
2015-01-27 Marek OlsakR600/SI: Add VI versions of LDS atomics
2015-01-15 Marek OlsakR600/SI: Add common class VOPAnyCommon
2015-01-14 Tom StellardR600/SI: Define a schedule model
2014-12-07 Marek OlsakR600/SI: Add VI instructions
2014-12-01 Matt ArsenaultR600/SI: Various instruction format bit test cleanups
2014-11-26 Craig TopperReplace neverHasSideEffects=1 with hasSideEffects=0...
2014-11-21 Tom StellardR600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-18 Matt ArsenaultR600/SI: Set hasSideEffects = 0 on load and store instr...
2014-11-14 Tom StellardR600/SI: Start implementing an assembler
2014-10-07 Tom StellardR600/SI: Refactor VOP1 instruction defs
2014-10-01 Tom StellardR600/SI: Add a generic pseudo EXP instruction
2014-10-01 Tom StellardR600/SI: Add generic pseudo MTBUF instructions
2014-10-01 Tom StellardR600/SI: Add generic pseudo SMRD instructions
2014-09-26 Matt ArsenaultR600/SI: Partially move operand legalization to post...
2014-09-24 Matt ArsenaultR600/SI: Enable named operand table for SALU instructions
2014-09-15 Matt ArsenaultR600/SI: Add preliminary support for flat address space
2014-09-15 Matt ArsenaultR600/SI: Enable named operand table for MTBUF
2014-08-01 Tom StellardR600/SI: Do abs/neg folding with ComplexPatterns
2014-07-29 Matt ArsenaultR600/SI: Enable named operand table for DS instructions
2014-07-29 Matt ArsenaultR600/SI: Add isMUBUF / isMTBUF
2014-07-29 Matt ArsenaultR600/SI: Set bits on SMRD instructions
2014-07-21 Tom StellardR600/SI: Refactor VOP3 instruction definitions
2014-07-21 Tom StellardR600/SI: Separate encoding and operand definitions...
2014-07-21 Tom StellardR600/SI: Add instruction shrinking pass
2014-07-21 Tom StellardR600/SI: Rename SOPP operands to match the encoding...
2014-06-17 Tom StellardR600/SI: Make sure target flags are set on pseudo VOP3...
2014-05-16 Tom StellardR600/SI: Add a PredicateControl class for managing...
2014-05-10 Vincent LejeuneR600/SI: Prettier display of input modifiers
2014-03-21 Tom StellardR600/SI: Handle MUBUF instructions in SIInstrInfo:...
2013-11-13 Tom StellardR600/SI: Prefer SALU instructions for bit shift operations
2013-10-10 Tom StellardR600/SI: Implement SIInstrInfo::verifyInstruction(...
2013-08-16 Michel DanzerR600/SI: Fix broken encoding of DS_WRITE_B32
2013-08-14 Tom StellardR600/SI: Assign a register class to the $vaddr operand...
2013-07-10 Michel DanzerR600/SI: Initial support for LDS/GDS instructions
2013-05-20 Tom StellardR600/SI: Use the same names for VOP3 operands and encod...
2013-04-05 Tom StellardR600/SI: Use same names for corresponding MUBUF operand...
2013-03-01 Christian KonigR600/SI: remove GPR*AlignEncode
2013-02-21 Christian KonigR600/SI: cleanup SIInstrInfo.td and SIInstrFormat.td
2013-02-16 Christian KonigR600/SI: nuke SReg_1 v3
2013-02-16 Christian KonigR600/SI: replace AllReg_* with [SV]Src_* v2
2013-02-16 Christian KonigR600/SI: fix VOPC encoding v2
2013-02-16 Christian KonigR600/SI: move *_Helper definitions to SIInstrFormat.td
2012-12-11 Tom StellardAdd R600 backend