Reapply r235977 "[DebugInfo] Add debug locations to constant SD nodes"
[oota-llvm.git] / lib / Target / R600 / SIISelLowering.cpp
2015-04-28 Sergey DmitroukReapply r235977 "[DebugInfo] Add debug locations to...
2015-04-28 Daniel JasperRevert "[DebugInfo] Add debug locations to constant...
2015-04-28 Sergey Dmitrouk[DebugInfo] Add debug locations to constant SD nodes
2015-04-12 Jan VeselyR600: Make FMIN/MAXNUM legal on all asics
2015-04-08 Tom StellardR600/SI: Initial support for assembler and inline assembly
2015-03-24 Marek OlsakR600/SI: Use V_FRACT_F64 for faster 64-bit floor on SI
2015-03-24 Marek OlsakR600/SI: Expand fract to floor, then only select V_FRAC...
2015-03-16 Tom StellardR600/SI: don't try min3/max3/med3 with f64
2015-03-11 Eric ChristopherRemove the need to cache the subtarget in the R600...
2015-03-07 Benjamin KramerMake constant arrays that are passed to functions as...
2015-02-26 Eric ChristopherRemove an argument-less call to getSubtargetImpl from...
2015-02-24 Tom StellardR600/SI: Remove isel mubuf legalization
2015-02-21 Tim NorthoverCodeGen: convert CCState interface to using ArrayRefs
2015-02-20 Matt ArsenaultR600/SI: Remove v_sub_f64 pseudo
2015-02-20 Matt ArsenaultR600: Use new fmad node.
2015-02-17 Benjamin KramerPrefer SmallVector::append/insert over push_back loops.
2015-02-16 Andrew TrickAArch64: Safely handle the incoming sret call argument.
2015-02-14 Matt ArsenaultR600/SI: Implement correct f64 fdiv
2015-02-13 Matt ArsenaultR600/SI: Allow f64 inline immediates in i64 operands
2015-02-11 Tom StellardR600/SI: Add soffset operand to mubuf addr64 instruction
2015-02-04 Tom StellardR600/SI: Expand misaligned 16-bit memory accesses
2015-02-04 Tom StellardR600/SI: Make more store operations legal
2015-02-02 Tom StellardR600/SI: 64-bit and larger memory access must be at...
2015-01-30 Eric ChristopherReuse a bunch of cached subtargets and remove getSubtar...
2015-01-29 Matt ArsenaultR600/SI: Implement enableAggressiveFMAFusion
2015-01-29 Matt ArsenaultR600/SI: Add subtarget feature for if f32 fma is fast
2015-01-20 Tom StellardR600/SI: Add subtarget feature to enable VGPR spilling...
2015-01-14 Matt ArsenaultR600/SI: Fix bad code with unaligned byte vector loads
2015-01-14 Matt ArsenaultImplement new way of expanding extloads.
2015-01-13 Tom StellardR600/SI: Add pattern for bitcasting fp immediates to...
2015-01-12 Matt ArsenaultR600/SI: Remove redundant setting expand on f64 vectors
2015-01-12 Tom StellardR600/SI: Use RegisterOperands to specify which operands...
2015-01-08 Tom StellardR600/SI: Remove SIISelLowering::legalizeOperands()
2015-01-08 Ahmed Bougacha[SelectionDAG] Allow targets to specify legality of...
2015-01-07 Tom StellardR600/SI: Remove VReg_32 register class
2015-01-06 Matt ArsenaultR600/SI: Add combine for isinfinite pattern
2015-01-06 Matt ArsenaultR600/SI: Pattern match isinf to v_cmp_class instructions
2015-01-06 Matt ArsenaultR600/SI: Add basic DAG combines for fp_class
2014-12-21 Matt ArsenaultEnable (sext x) == C --> x == (trunc C) combine
2014-12-17 Matt ArsenaultR600/SI: Fix f64 inline immediates
2014-12-12 Matt ArsenaultR600/SI: Don't promote f32 select to i32
2014-12-11 Matt ArsenaultR600/SI: Use unordered equal instructions
2014-12-11 Matt ArsenaultR600/SI: Make more unordered comparisons legal
2014-12-11 Matt ArsenaultR600/SI: Use unordered not equal instructions
2014-12-10 Marek OlsakR600/SI: Use getTargetConstant in AdjustRegClass
2014-12-07 Marek OlsakR600/SI: Set 20-bit immediate byte offset for SMRD...
2014-12-02 Tom StellardR600/SI: Set correct number of user sgprs for HSA runtime
2014-12-02 Tom StellardR600/SI: Set the ATC bit on all resource descriptors...
2014-11-28 Matt ArsenaultR600/SI: Fix assertion on sign extend of 3 vectors
2014-11-21 Tom StellardR600/SI: Emit s_mov_b32 m0, -1 before every DS instruction
2014-11-18 Tom StellardR600/SI: Make sure resource descriptors are always...
2014-11-16 Craig TopperConvert some EVTs to MVTs where only a SimpleValueType...
2014-11-14 Matt ArsenaultR600/SI: Combine min3/max3 instructions
2014-11-14 Matt ArsenaultR600/SI: Use S_BFE_I64 for 64-bit sext_inreg
2014-11-13 Matt ArsenaultR600/SI: Get rid of FCLAMP_SI pseudo
2014-11-05 Matt ArsenaultR600/SI: Move all rsrc building functions to SIISelLowering
2014-11-05 Matt ArsenaultR600/SI: Remove SI_ADDR64_RSRC
2014-11-02 Matt ArsenaultR600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs
2014-10-21 Matt ArsenaultAdd minnum / maxnum codegen
2014-10-21 Matt ArsenaultR600/SI: Add pattern for bswap
2014-10-17 Matt ArsenaultR600/SI: Remove SI_BUFFER_RSRC pseudo
2014-10-14 Jan VeselyReapply "R600: Add new intrinsic to read work dimensions"
2014-10-14 Rafael EspindolaRevert "R600: Add new intrinsic to read work dimensions"
2014-10-14 Jan VeselyR600: Add new intrinsic to read work dimensions
2014-10-09 Tom StellardR600/SI: Legalize CopyToReg during instruction selection
2014-10-09 Tom StellardR600/SI: Legalize INSERT_SUBREG instructions during...
2014-10-03 Matt ArsenaultR600/SI: Custom lower f64 -> i64 conversions
2014-09-29 Matt ArsenaultR600/SI: Also fix fsub + fadd a, a to mad combines
2014-09-29 Matt ArsenaultR600/SI: Fix using mad with multiplies by 2
2014-09-26 Matt ArsenaultR600/SI: Partially move operand legalization to post...
2014-09-26 Matt ArsenaultR600/SI: Remove apparently dead code in legalizeOperands
2014-09-23 Tom StellardR600/SI: Clean up checks for legality of immediate...
2014-09-22 Tom StellardR600/SI: Add enums for some hard-coded values
2014-09-17 Matt ArsenaultR600/SI: Remove promotion of instructions to e64 forms.
2014-09-10 Matt ArsenaultR600/SI: Fix losing chain when fixing reg class of...
2014-09-08 Matt ArsenaultR600/SI: Fix assertion from copying a TargetGlobalAddress
2014-09-08 Matt ArsenaultR600/SI: Replace LDS atomics with no return versions
2014-08-29 Matt ArsenaultR600/SI: Use mad for fsub + fmul
2014-08-27 Alexey SamsonovUse BitVector instead of int in R600 SIISelLowering.
2014-08-22 Tom StellardR600/SI: Wrap local memory pointer in AssertZExt on SI
2014-08-21 Tom StellardR600/SI: Make sure SCRATCH_WAVE_OFFSET is added as...
2014-08-18 Aaron BallmanSilencing an MSVC warning about loop variable conflicti...
2014-08-15 Matt ArsenaultR600/SI: Move all fabs / fneg handling to patterns
2014-08-15 Matt ArsenaultR600/SI: Use source modifiers for f64 fneg
2014-08-15 Matt ArsenaultR600/SI: Use source modifier for f64 fabs
2014-08-15 Matt ArsenaultR600/SI: Fix offset folding in some cases with shifted...
2014-08-15 Matt ArsenaultR600/SI: Implement isLegalAddressingMode
2014-08-09 Tom StellardR600/SI: Custom lower CONCAT_VECTORS
2014-08-06 Eric ChristopherRemove the target machine from CCState. Previously...
2014-08-04 Eric ChristopherRemove the TargetMachine forwards for TargetSubtargetIn...
2014-08-02 Matt ArsenaultR600/SI: Fix formatting.
2014-08-01 Chandler Carruth[SDAG] MorphNodeTo recursively deletes dead operands...
2014-08-01 Tom StellardR600/SI: Do abs/neg folding with ComplexPatterns
2014-07-28 Matt ArsenaultR600/SI: Implement getOptimalMemOpType
2014-07-28 Matt ArsenaultR600/SI: Make argument loads invariant
2014-07-27 Matt ArsenaultAdd alignment value to allowsUnalignedMemoryAccess
2014-07-26 Matt ArsenaultR600: Move intrinsic lowering to separate functions
2014-07-24 Matt ArsenaultR600: Add new functions for splitting vector loads...
2014-07-21 Tom StellardR600/SI: Clean up some of the unused REGISTER_{LOAD...
2014-07-21 Tom StellardR600/SI: Use scratch memory for large private arrays
next