R600/SI: Fix assertion from copying a TargetGlobalAddress

Assert in scheduler from an inserted copy_to_regclass from
a constant.

This only seems to break sometimes when a constant initializer
address is forced into VGPRs in a non-entry block. No test
since the only case I've managed to hit only happens with a future
patch, and that case will also not be a problem once scalar instructions
are used in non-entry blocks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217380 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/R600/SIISelLowering.cpp b/lib/Target/R600/SIISelLowering.cpp
index b5054d17049d517ca1c197e8f763d7c99fc22817..629a42cdfbd4bf4346a7adafdb718de6ee46a2af 100644 (file)
--- a/lib/Target/R600/SIISelLowering.cpp
+++ b/lib/Target/R600/SIISelLowering.cpp
@@ -1641,7 +1641,8 @@ void SITargetLowering::ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
 
   SDNode *Node;
   // We can't use COPY_TO_REGCLASS with FrameIndex arguments.
-  if (isa<FrameIndexSDNode>(Operand)) {
+  if (isa<FrameIndexSDNode>(Operand) ||
+      isa<GlobalAddressSDNode>(Operand)) {
     unsigned Opcode = Operand.getValueType() == MVT::i32 ?
                       AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
     Node = DAG.getMachineNode(Opcode, SDLoc(), Operand.getValueType(),